On Wed, Jan 16, 2013 at 3:11 PM, Allen Martin amartin@nvidia.com wrote:
These nodes are unused.
Signed-off-by: Allen Martin amartin@nvidia.com
I can't remember the code that used this - maybe it never went upstream? Obviously we don't need it.
Acked-by: Simon Glass sjg@chromium.org
v2: remove "clock" as well as "clocks" nodes remove from non nvidia tegra boards as well v1: original submission
arch/arm/dts/tegra20.dtsi | 10 ---------- arch/arm/dts/tegra30.dtsi | 10 ---------- board/avionic-design/dts/tegra20-medcom-wide.dts | 14 -------------- board/avionic-design/dts/tegra20-plutux.dts | 14 -------------- board/avionic-design/dts/tegra20-tec.dts | 14 -------------- board/compal/dts/tegra20-paz00.dts | 13 ------------- board/compulab/dts/tegra20-trimslice.dts | 13 ------------- board/nvidia/dts/tegra20-harmony.dts | 13 ------------- board/nvidia/dts/tegra20-seaboard.dts | 10 ---------- board/nvidia/dts/tegra20-ventana.dts | 13 ------------- board/nvidia/dts/tegra20-whistler.dts | 10 ---------- board/nvidia/dts/tegra30-cardhu.dts | 13 ------------- 12 files changed, 147 deletions(-)
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi index 636ec2c..cc086b1 100644 --- a/arch/arm/dts/tegra20.dtsi +++ b/arch/arm/dts/tegra20.dtsi @@ -10,16 +10,6 @@ #clock-cells = <1>; };
clocks {#address-cells = <1>;#size-cells = <0>;osc: clock {compatible = "fixed-clock";#clock-cells = <0>;};};intc: interrupt-controller@50041000 { compatible = "nvidia,tegra20-gic"; interrupt-controller;diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi index 664c397..09bdb36 100644 --- a/arch/arm/dts/tegra30.dtsi +++ b/arch/arm/dts/tegra30.dtsi @@ -9,16 +9,6 @@ #clock-cells = <1>; };
clocks {#address-cells = <1>;#size-cells = <0>;osc: clock {compatible = "fixed-clock";#clock-cells = <0>;};};i2c@7000c000 { #address-cells = <1>; #size-cells = <0>;diff --git a/board/avionic-design/dts/tegra20-medcom-wide.dts b/board/avionic-design/dts/tegra20-medcom-wide.dts index 70587a6..e46afbe 100644 --- a/board/avionic-design/dts/tegra20-medcom-wide.dts +++ b/board/avionic-design/dts/tegra20-medcom-wide.dts @@ -14,16 +14,6 @@ reg = <0x00000000 0x20000000>; };
clocks {clk_32k: clk_32k {clock-frequency = <32000>;};osc {clock-frequency = <12000000>;};};host1x { status = "okay";@@ -37,10 +27,6 @@ }; };
clock@60006000 {clocks = <&clk_32k &osc>;};serial@70006300 { clock-frequency = <216000000>; };diff --git a/board/avionic-design/dts/tegra20-plutux.dts b/board/avionic-design/dts/tegra20-plutux.dts index 78c394f..3e6cce0 100644 --- a/board/avionic-design/dts/tegra20-plutux.dts +++ b/board/avionic-design/dts/tegra20-plutux.dts @@ -14,20 +14,6 @@ reg = <0x00000000 0x20000000>; };
clocks {clk_32k: clk_32k {clock-frequency = <32000>;};osc {clock-frequency = <12000000>;};};clock@60006000 {clocks = <&clk_32k &osc>;};serial@70006300 { clock-frequency = <216000000>; };diff --git a/board/avionic-design/dts/tegra20-tec.dts b/board/avionic-design/dts/tegra20-tec.dts index cdb7527..8135eeb 100644 --- a/board/avionic-design/dts/tegra20-tec.dts +++ b/board/avionic-design/dts/tegra20-tec.dts @@ -14,16 +14,6 @@ reg = <0x00000000 0x20000000>; };
clocks {clk_32k: clk_32k {clock-frequency = <32000>;};osc {clock-frequency = <12000000>;};};host1x { status = "okay";@@ -37,10 +27,6 @@ }; };
clock@60006000 {clocks = <&clk_32k &osc>;};serial@70006300 { clock-frequency = <216000000>; };diff --git a/board/compal/dts/tegra20-paz00.dts b/board/compal/dts/tegra20-paz00.dts index afebbe5..0fef713 100644 --- a/board/compal/dts/tegra20-paz00.dts +++ b/board/compal/dts/tegra20-paz00.dts @@ -14,19 +14,6 @@ reg = <0x00000000 0x20000000>; };
clocks {clk_32k: clk_32k {clock-frequency = <32000>;};osc {clock-frequency = <12000000>;};};clock@60006000 {clocks = <&clk_32k &osc>;};serial@70006000 { clock-frequency = < 216000000 >; };diff --git a/board/compulab/dts/tegra20-trimslice.dts b/board/compulab/dts/tegra20-trimslice.dts index 4450674..c8a4dd4 100644 --- a/board/compulab/dts/tegra20-trimslice.dts +++ b/board/compulab/dts/tegra20-trimslice.dts @@ -15,19 +15,6 @@ reg = <0x00000000 0x40000000>; };
clocks {clk_32k: clk_32k {clock-frequency = <32000>;};osc {clock-frequency = <12000000>;};};clock@60006000 {clocks = <&clk_32k &osc>;};serial@70006000 { clock-frequency = <216000000>; };diff --git a/board/nvidia/dts/tegra20-harmony.dts b/board/nvidia/dts/tegra20-harmony.dts index 5645a8d..b456406 100644 --- a/board/nvidia/dts/tegra20-harmony.dts +++ b/board/nvidia/dts/tegra20-harmony.dts @@ -15,19 +15,6 @@ reg = <0x00000000 0x40000000>; };
clocks {clk_32k: clk_32k {clock-frequency = <32000>;};osc {clock-frequency = <12000000>;};};clock@60006000 {clocks = <&clk_32k &osc>;};serial@70006300 { clock-frequency = < 216000000 >; };diff --git a/board/nvidia/dts/tegra20-seaboard.dts b/board/nvidia/dts/tegra20-seaboard.dts index dd98ca4..5fd8ae2 100644 --- a/board/nvidia/dts/tegra20-seaboard.dts +++ b/board/nvidia/dts/tegra20-seaboard.dts @@ -45,16 +45,6 @@ }; };
clocks {osc {clock-frequency = <12000000>;};};clock@60006000 {clocks = <&clk_32k &osc>;};serial@70006300 { clock-frequency = < 216000000 >; };diff --git a/board/nvidia/dts/tegra20-ventana.dts b/board/nvidia/dts/tegra20-ventana.dts index 38b7b13..3e5e39d 100644 --- a/board/nvidia/dts/tegra20-ventana.dts +++ b/board/nvidia/dts/tegra20-ventana.dts @@ -14,19 +14,6 @@ reg = <0x00000000 0x40000000>; };
clocks {clk_32k: clk_32k {clock-frequency = <32000>;};osc {clock-frequency = <12000000>;};};clock@60006000 {clocks = <&clk_32k &osc>;};serial@70006300 { clock-frequency = < 216000000 >; };diff --git a/board/nvidia/dts/tegra20-whistler.dts b/board/nvidia/dts/tegra20-whistler.dts index f830cf3..4579557 100644 --- a/board/nvidia/dts/tegra20-whistler.dts +++ b/board/nvidia/dts/tegra20-whistler.dts @@ -16,16 +16,6 @@ reg = < 0x00000000 0x20000000 >; };
clocks {osc {clock-frequency = <12000000>;};};clock@60006000 {clocks = <&clk_32k &osc>;};serial@70006000 { clock-frequency = < 216000000 >; };diff --git a/board/nvidia/dts/tegra30-cardhu.dts b/board/nvidia/dts/tegra30-cardhu.dts index 60b91b4..3223ed4 100644 --- a/board/nvidia/dts/tegra30-cardhu.dts +++ b/board/nvidia/dts/tegra30-cardhu.dts @@ -20,19 +20,6 @@ reg = <0x80000000 0x40000000>; };
clocks {clk_32k: clk_32K {clock-frequency = <32768>;};osc {clock-frequency = <12000000>;};};clock@60006000 {clocks = <&clk_32k &osc>;};i2c@7000c000 { clock-frequency = <100000>; };-- 1.7.10.4