[U-Boot-Users] question of codes in \cpu\74xx_7xx\cache.S

intercepted from \cpu\74xx_7xx\cache.S

/* * Enable L1 Instruction cache */ _GLOBAL(icache_enable) mfspr r3, HID0 li r5, HID0_ICFI|HID0_ILOCK andc r3, r3, r5 ori r3, r3, HID0_ICE ori r5, r3, HID0_ICFI mtspr HID0, r5 // this instruction is redundant, mtspr HID0, r3 // or this one? isync blr

-lxg