Hi Guys,
I got it working..
Regards,
john
On Fri, Oct 3, 2014 at 10:44 AM, John Tobias john.tobias.ph@gmail.com wrote:
Hi All,
I have an iMX6SL custom board with two 512 MB (CS0 and CS1) of DDR3. The two DDR are working fine and the kernel could see it 1GB. I need to disable the CS1 to work my device with 512MB at the same time to see the performance of my system. I used the MX6SL_MMDC_DDR3_register programming v0.5 to disable the CS1.
Here are the summary of the new settings:
// Manufacturer: Micron // Clock Freq.: 400MHz // Density per CS in Gb: 4 // Chip Selects used: 1 // Total DRAM density (Gb) 4 // Number of Banks: 8 // Row address: 14 // Column address: 10 // Data bus width 16
In my u-boot config file, I changed default value of PHYS_SDRAM_SIZE from SZ_1GB to SZ_512M
The problem right now is that the kernel only seeing 256M instead of 512M. I would like to know if I am missing something on my configuration?.
Regards,
John