Mainline Linux kernel has adopted SPDX header license in a different format then was used before. This patch is syncing it up.
Also update years in License text and remove Nathalie's email because it is no longer valid.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-clk-ccf.dtsi | 3 +-- arch/arm/dts/zynqmp-clk.dtsi | 5 ++--- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 5 ++--- arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 5 ++--- arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 5 ++--- arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 5 ++--- arch/arm/dts/zynqmp-zcu102-rev1.0.dts | 5 ++--- arch/arm/dts/zynqmp-zcu102-revA.dts | 5 ++--- arch/arm/dts/zynqmp-zcu102-revB.dts | 5 ++--- arch/arm/dts/zynqmp.dtsi | 6 +++++- 10 files changed, 22 insertions(+), 27 deletions(-)
diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index 4449d5b93d1f..b18d8d19c304 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * Clock specification for Xilinx ZynqMP * * (C) Copyright 2017, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
/ { diff --git a/arch/arm/dts/zynqmp-clk.dtsi b/arch/arm/dts/zynqmp-clk.dtsi index f6e83e15132a..45d84a6b7df9 100644 --- a/arch/arm/dts/zynqmp-clk.dtsi +++ b/arch/arm/dts/zynqmp-clk.dtsi @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * Clock specification for Xilinx ZynqMP * - * (C) Copyright 2015, Xilinx, Inc. + * (C) Copyright 2015 - 2018, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
/ { diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index 9062ffe919e1..0ddb43df6d4f 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * dts file for Xilinx ZynqMP zc1751-xm015-dc1 * - * (C) Copyright 2015, Xilinx, Inc. + * (C) Copyright 2015 - 2018, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
/dts-v1/; diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts index bf43bf874885..670cc447559c 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * dts file for Xilinx ZynqMP zc1751-xm016-dc2 * - * (C) Copyright 2015, Xilinx, Inc. + * (C) Copyright 2015 - 2018, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
/dts-v1/; diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts index 39c82c592f73..41012fa61de5 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * dts file for Xilinx ZynqMP zc1751-xm018-dc4 * - * (C) Copyright 2015 - 2016, Xilinx, Inc. + * (C) Copyright 2015 - 2018, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
/dts-v1/; diff --git a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts index c774b866fb14..99aa74e54e67 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts @@ -1,12 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * dts file for Xilinx ZynqMP zc1751-xm019-dc5 * - * (C) Copyright 2015, Xilinx, Inc. + * (C) Copyright 2015 - 2018, Xilinx, Inc. * * Siva Durga Prasad siva.durga.paladugu@xilinx.com * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
/dts-v1/; diff --git a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts index 323a674e3a62..3fc3e749913a 100644 --- a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts +++ b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * dts file for Xilinx ZynqMP ZCU102 Rev1.0 * - * (C) Copyright 2016, Xilinx, Inc. + * (C) Copyright 2016 - 2018, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
#include "zynqmp-zcu102-revB.dts" diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 5f4ac22e1d7a..c9cffc125bfb 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * dts file for Xilinx ZynqMP ZCU102 RevA * - * (C) Copyright 2015, Xilinx, Inc. + * (C) Copyright 2015 - 2018, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
/dts-v1/; diff --git a/arch/arm/dts/zynqmp-zcu102-revB.dts b/arch/arm/dts/zynqmp-zcu102-revB.dts index 46517ba0b4e2..384d0a2a0c12 100644 --- a/arch/arm/dts/zynqmp-zcu102-revB.dts +++ b/arch/arm/dts/zynqmp-zcu102-revB.dts @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * dts file for Xilinx ZynqMP ZCU102 RevB * - * (C) Copyright 2016, Xilinx, Inc. + * (C) Copyright 2016 - 2018, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
#include "zynqmp-zcu102-revA.dts" diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index e71399f83d27..ad4bbbf66750 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * dts file for Xilinx ZynqMP * @@ -5,7 +6,10 @@ * * Michal Simek michal.simek@xilinx.com * - * SPDX-License-Identifier: GPL-2.0+ + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. */
/ {