On 08/18/2014 02:00 AM, Thierry Reding wrote:
From: Thierry Reding treding@nvidia.com
To work around potential issues with explicit cache maintenance of the RX and TX descriptor rings, allocate them from a pool of uncached memory if the architecture supports it.
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
+#ifndef CONFIG_SYS_NONCACHED_MEMORY /* Define the TX Descriptor */ DEFINE_ALIGN_BUFFER(struct TxDesc, tx_ring, NUM_TX_DESC, RTL8169_ALIGN);
/* Define the RX Descriptor */ DEFINE_ALIGN_BUFFER(struct RxDesc, rx_ring, NUM_RX_DESC, RTL8169_ALIGN); +#endif
It feels slightly inconsistent to have one case allocate this memory in BSS at compile-time, and in the other to allocate it dynamically.
Would it be better to remove this global, and simply call different APIs (regular aligned malloc, v.s. non-cached allocate) during rtl_init()?