Timur Tabi wrote:
Wolfgang Grandegger wrote:
I did not follow the thread yet, sorry. I implemented AN2819 for Linux (see http://lxr.linux.no/#linux+v2.6.31/drivers/i2c/busses/i2c-mpc.c) some time ago using Timur's table approach. But there is no difference between the table and the algorithm to calculate the value. The table is actually derived from the same algorithm.
The problem with the table is that it does not allow for flexibility in
choosing dfsr. When I implemented the table code, I did not think that this was a problem, but apparently it is.
What would be the criteria to choose dfsr, especially for a defined bus frequency.
It is in the new AN2919: • Condition 1: C ≤ 50 ÷ T. This means that the product of the decimal equivalent of the value in the DFSR and the source clock period must not exceed 50 ns. Thus, given a specific source clock period, the value in the DFSR must not be so high that it violates this condition.
I just compared the u-boot fsl-i2c.c driver with the kernel one and I think u-boot is buggy. One cannot disable I2C directly after a read/write of last byte. There has to be some time for the controller to generate STOP. There are other differences too that I am not sure if they are significant or not.
Jocke