P1014 is a variant of P1010. There is no P1014 target configured. Drop related macros. P1014 SoC is still supported.
Signed-off-by: York Sun york.sun@nxp.com ---
arch/powerpc/cpu/mpc85xx/Makefile | 1 - arch/powerpc/cpu/mpc85xx/speed.c | 3 +-- arch/powerpc/include/asm/config_mpc85xx.h | 17 ----------------- arch/powerpc/include/asm/immap_85xx.h | 4 ++-- doc/README.mpc85xx-sd-spi-boot | 1 - 5 files changed, 3 insertions(+), 23 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile index 707d784..b52cf79 100644 --- a/arch/powerpc/cpu/mpc85xx/Makefile +++ b/arch/powerpc/cpu/mpc85xx/Makefile @@ -74,7 +74,6 @@ obj-$(CONFIG_ARCH_MPC8569) += mpc8569_serdes.o obj-$(CONFIG_ARCH_MPC8572) += mpc8572_serdes.o obj-$(CONFIG_ARCH_P1010) += p1010_serdes.o obj-$(CONFIG_ARCH_P1011) += p1021_serdes.o -obj-$(CONFIG_P1014) += p1010_serdes.o obj-$(CONFIG_P1017) += p1023_serdes.o obj-$(CONFIG_P1020) += p1021_serdes.o obj-$(CONFIG_P1021) += p1021_serdes.o diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 83fa04c..4e63859 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -707,8 +707,7 @@ int get_clocks (void) #ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK gd->arch.sdhc_clk = sys_info.freq_sdhc / 2; #else -#if defined(CONFIG_ARCH_MPC8569) || defined(CONFIG_ARCH_P1010) ||\ - defined(CONFIG_P1014) +#if defined(CONFIG_ARCH_MPC8569) || defined(CONFIG_ARCH_P1010) gd->arch.sdhc_clk = gd->bus_clk; #else gd->arch.sdhc_clk = gd->bus_clk / 2; diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 5b6c872..31723ea 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -183,23 +183,6 @@ #define CONFIG_SYS_FSL_ERRATUM_A004508 #define CONFIG_SYS_FSL_ERRATUM_A005125
-#elif defined(CONFIG_P1014) -#define CONFIG_MAX_CPUS 1 -#define CONFIG_FSL_SDHC_V2_3 -#define CONFIG_SYS_FSL_NUM_LAWS 12 -#define CONFIG_SYS_PPC_E500_DEBUG_TLB 3 -#define CONFIG_TSECV2 -#define CONFIG_SYS_FSL_SEC_COMPAT 4 -#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 -#define CONFIG_NUM_DDR_CONTROLLERS 1 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 -#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY -#define CONFIG_SYS_FSL_ERRATUM_IFC_A002769 -#define CONFIG_SYS_FSL_ERRATUM_P1010_A003549 -#define CONFIG_SYS_FSL_ERRATUM_IFC_A003399 -#define CONFIG_SYS_FSL_ERRATUM_A004508 - /* P1017 is single core version of P1023 */ #elif defined(CONFIG_P1017) #define CONFIG_MAX_CPUS 1 diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index c82daab..222bb4c 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2222,7 +2222,7 @@ typedef struct ccsr_gur { u32 gpindr; /* General-purpose input data */ u8 res5[12]; u32 pmuxcr; /* Alt. function signal multiplex control */ -#if defined(CONFIG_ARCH_P1010) || defined(CONFIG_P1014) +#if defined(CONFIG_ARCH_P1010) #define MPC85xx_PMUXCR_TSEC1_0_1588 0x40000000 #define MPC85xx_PMUXCR_TSEC1_0_RES 0xC0000000 #define MPC85xx_PMUXCR_TSEC1_1_1588_TRIG 0x10000000 @@ -2350,7 +2350,7 @@ typedef struct ccsr_gur { #define MPC85xx_PMUXCR_SPI_GPIO 0x00000100 #endif u32 pmuxcr2; /* Alt. function signal multiplex control 2 */ -#if defined(CONFIG_ARCH_P1010) || defined(CONFIG_P1014) +#if defined(CONFIG_ARCH_P1010) #define MPC85xx_PMUXCR2_UART_GPIO 0x40000000 #define MPC85xx_PMUXCR2_UART_TDM 0x80000000 #define MPC85xx_PMUXCR2_UART_RES 0xC0000000 diff --git a/doc/README.mpc85xx-sd-spi-boot b/doc/README.mpc85xx-sd-spi-boot index a08db92..b7d57be 100644 --- a/doc/README.mpc85xx-sd-spi-boot +++ b/doc/README.mpc85xx-sd-spi-boot @@ -67,7 +67,6 @@ P2010RDB config_ddr3_1gb_64bit_p2020rdb_pc.dat P1020RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat P1011RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat P1010RDB config_ddr3_1gb_p1010rdb_800M.dat -P1014RDB config_ddr3_1gb_p1014rdb_800M.dat P1021RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat P1022DS config_ddr3_2gb_p1022ds.dat P1024RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat