Signed-off-by: Wolfgang Denk wd@denx.de --- MAKEALL | 1 - board/mx1fs2/Makefile | 51 --- board/mx1fs2/config.mk | 10 - board/mx1fs2/flash.c | 849 ------------------------------------------ board/mx1fs2/intel.h | 99 ----- board/mx1fs2/lowlevel_init.S | 188 ---------- board/mx1fs2/mx1fs2.c | 122 ------ boards.cfg | 1 - doc/README.scrapyard | 1 + include/configs/mx1fs2.h | 305 --------------- 10 files changed, 1 insertions(+), 1626 deletions(-) delete mode 100644 board/mx1fs2/Makefile delete mode 100644 board/mx1fs2/config.mk delete mode 100644 board/mx1fs2/flash.c delete mode 100644 board/mx1fs2/intel.h delete mode 100644 board/mx1fs2/lowlevel_init.S delete mode 100644 board/mx1fs2/mx1fs2.c delete mode 100644 include/configs/mx1fs2.h
diff --git a/MAKEALL b/MAKEALL index 1f6baba..8eaa0d5 100755 --- a/MAKEALL +++ b/MAKEALL @@ -326,7 +326,6 @@ LIST_ARM9=" \ magnesium \ mv88f6281gtw_ge \ mx1ads \ - mx1fs2 \ netstar \ nhk8815 \ nhk8815_onenand \ diff --git a/board/mx1fs2/Makefile b/board/mx1fs2/Makefile deleted file mode 100644 index c55b695..0000000 --- a/board/mx1fs2/Makefile +++ /dev/null @@ -1,51 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := mx1fs2.o flash.o -SOBJS := lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/mx1fs2/config.mk b/board/mx1fs2/config.mk deleted file mode 100644 index eb4d046..0000000 --- a/board/mx1fs2/config.mk +++ /dev/null @@ -1,10 +0,0 @@ -# -# This config file is used for compilation of IMX sources -# -# You might change location of U-Boot in memory by setting right CONFIG_SYS_TEXT_BASE. -# This allows for example having one copy located at the end of ram and stored -# in flash device and later on while developing use other location to test -# the code in RAM device only. -# - -CONFIG_SYS_TEXT_BASE = 0x08f00000 diff --git a/board/mx1fs2/flash.c b/board/mx1fs2/flash.c deleted file mode 100644 index da4ebe6..0000000 --- a/board/mx1fs2/flash.c +++ /dev/null @@ -1,849 +0,0 @@ -/* - * (C) 2000-2004 Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * (C) 2003 August Hoeraendl, Logotronic GmbH - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#undef CONFIG_FLASH_16BIT - -#include <common.h> - -#define FLASH_BANK_SIZE MX1FS2_FLASH_BANK_SIZE -#define MAIN_SECT_SIZE MX1FS2_FLASH_SECT_SIZE - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -/* - * NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it - * has nothing to do with the flash chip being 8-bit or 16-bit. - */ -#ifdef CONFIG_FLASH_16BIT -typedef unsigned short FLASH_PORT_WIDTH; -typedef volatile unsigned short FLASH_PORT_WIDTHV; - -#define FLASH_ID_MASK 0xFFFF -#else -typedef unsigned long FLASH_PORT_WIDTH; -typedef volatile unsigned long FLASH_PORT_WIDTHV; - -#define FLASH_ID_MASK 0xFFFFFFFF -#endif - -#define FPW FLASH_PORT_WIDTH -#define FPWV FLASH_PORT_WIDTHV - -#define ORMASK(size) ((-size) & OR_AM_MSK) - -/*----------------------------------------------------------------------- - * Functions - */ -#if 0 -static ulong flash_get_size(FPWV * addr, flash_info_t * info); -static void flash_get_offsets(ulong base, flash_info_t * info); -#endif -static void flash_reset(flash_info_t * info); -static int write_word_intel(flash_info_t * info, FPWV * dest, FPW data); -static int write_word_amd(flash_info_t * info, FPWV * dest, FPW data); -#define write_word(in, de, da) write_word_amd(in, de, da) -#ifdef CONFIG_SYS_FLASH_PROTECTION -static void flash_sync_real_protect(flash_info_t * info); -#endif - -/*----------------------------------------------------------------------- - * flash_init() - * - * sets up flash_info and returns size of FLASH (bytes) - */ -ulong -flash_init(void) -{ - int i, j; - ulong size = 0; - - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { - ulong flashbase = 0; - flash_info[i].flash_id = - (FLASH_MAN_AMD & FLASH_VENDMASK) | - (FLASH_AM640U & FLASH_TYPEMASK); - flash_info[i].size = FLASH_BANK_SIZE; - flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT; - memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT); - switch (i) { - case 0: - flashbase = MX1FS2_FLASH_BASE; - break; - default: - panic("configured too many flash banks!\n"); - break; - } - for (j = 0; j < flash_info[i].sector_count; j++) { - flash_info[i].start[j] = flashbase + j * MAIN_SECT_SIZE; - } - size += flash_info[i].size; - } - - /* Protect monitor and environment sectors */ - flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + _bss_start - _armboot_start, - &flash_info[0]); - - flash_protect(FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]); - - return size; -} - -/*----------------------------------------------------------------------- - */ -static void -flash_reset(flash_info_t * info) -{ - FPWV *base = (FPWV *) (info->start[0]); - - /* Put FLASH back in read mode */ - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) - *base = (FPW) 0x00FF00FF; /* Intel Read Mode */ - else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD) - *base = (FPW) 0x00F000F0; /* AMD Read Mode */ -} - -/*----------------------------------------------------------------------- - */ -#if 0 -static void -flash_get_offsets(ulong base, flash_info_t * info) -{ - int i; - - /* set up sector start address table */ - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL - && (info->flash_id & FLASH_BTYPE)) { - int bootsect_size; /* number of bytes/boot sector */ - int sect_size; /* number of bytes/regular sector */ - - bootsect_size = 0x00002000 * (sizeof (FPW) / 2); - sect_size = 0x00010000 * (sizeof (FPW) / 2); - - /* set sector offsets for bottom boot block type */ - for (i = 0; i < 8; ++i) { - info->start[i] = base + (i * bootsect_size); - } - for (i = 8; i < info->sector_count; i++) { - info->start[i] = base + ((i - 7) * sect_size); - } - } else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD - && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U) { - - int sect_size; /* number of bytes/sector */ - - sect_size = 0x00010000 * (sizeof (FPW) / 2); - - /* set up sector start address table (uniform sector type) */ - for (i = 0; i < info->sector_count; i++) - info->start[i] = base + (i * sect_size); - } -} -#endif /* 0 */ - -/*----------------------------------------------------------------------- - */ - -void -flash_print_info(flash_info_t * info) -{ - int i; - uchar *boottype; - uchar *bootletter; - char *fmt; - uchar botbootletter[] = "B"; - uchar topbootletter[] = "T"; - uchar botboottype[] = "bottom boot sector"; - uchar topboottype[] = "top boot sector"; - - if (info->flash_id == FLASH_UNKNOWN) { - printf("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_AMD: - printf("AMD "); - break; - case FLASH_MAN_BM: - printf("BRIGHT MICRO "); - break; - case FLASH_MAN_FUJ: - printf("FUJITSU "); - break; - case FLASH_MAN_SST: - printf("SST "); - break; - case FLASH_MAN_STM: - printf("STM "); - break; - case FLASH_MAN_INTEL: - printf("INTEL "); - break; - default: - printf("Unknown Vendor "); - break; - } - - /* check for top or bottom boot, if it applies */ - if (info->flash_id & FLASH_BTYPE) { - boottype = botboottype; - bootletter = botbootletter; - } else { - boottype = topboottype; - bootletter = topbootletter; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM640U: - fmt = "29LV641D (64 Mbit, uniform sectors)\n"; - break; - case FLASH_28F800C3B: - case FLASH_28F800C3T: - fmt = "28F800C3%s (8 Mbit, %s)\n"; - break; - case FLASH_INTEL800B: - case FLASH_INTEL800T: - fmt = "28F800B3%s (8 Mbit, %s)\n"; - break; - case FLASH_28F160C3B: - case FLASH_28F160C3T: - fmt = "28F160C3%s (16 Mbit, %s)\n"; - break; - case FLASH_INTEL160B: - case FLASH_INTEL160T: - fmt = "28F160B3%s (16 Mbit, %s)\n"; - break; - case FLASH_28F320C3B: - case FLASH_28F320C3T: - fmt = "28F320C3%s (32 Mbit, %s)\n"; - break; - case FLASH_INTEL320B: - case FLASH_INTEL320T: - fmt = "28F320B3%s (32 Mbit, %s)\n"; - break; - case FLASH_28F640C3B: - case FLASH_28F640C3T: - fmt = "28F640C3%s (64 Mbit, %s)\n"; - break; - case FLASH_INTEL640B: - case FLASH_INTEL640T: - fmt = "28F640B3%s (64 Mbit, %s)\n"; - break; - default: - fmt = "Unknown Chip Type\n"; - break; - } - - printf(fmt, bootletter, boottype); - - printf(" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf(" Sector Start Addresses:"); - - for (i = 0; i < info->sector_count; ++i) { - if ((i % 5) == 0) { - printf("\n "); - } - - printf(" %08lX%s", info->start[i], - info->protect[i] ? " (RO)" : " "); - } - - printf("\n"); -} - -/*----------------------------------------------------------------------- - */ - -/* - * The following code cannot be run from FLASH! - */ - -#if 0 -ulong -flash_get_size(FPWV * addr, flash_info_t * info) -{ - /* Write auto select command: read Manufacturer ID */ - - /* Write auto select command sequence and test FLASH answer */ - addr[0x0555] = (FPW) 0x00AA00AA; /* for AMD, Intel ignores this */ - addr[0x02AA] = (FPW) 0x00550055; /* for AMD, Intel ignores this */ - addr[0x0555] = (FPW) 0x00900090; /* selects Intel or AMD */ - - /* The manufacturer codes are only 1 byte, so just use 1 byte. - * This works for any bus width and any FLASH device width. - */ - switch (addr[0] & 0xff) { - - case (uchar) AMD_MANUFACT: - info->flash_id = FLASH_MAN_AMD; - break; - - case (uchar) INTEL_MANUFACT: - info->flash_id = FLASH_MAN_INTEL; - break; - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - break; - } - - /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */ - if (info->flash_id != FLASH_UNKNOWN) - switch (addr[1]) { - - case (FPW) AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */ - info->flash_id += FLASH_AM640U; - info->sector_count = 128; - info->size = 0x00800000 * (sizeof (FPW) / 2); - break; /* => 8 or 16 MB */ - - case (FPW) INTEL_ID_28F800C3B: - info->flash_id += FLASH_28F800C3B; - info->sector_count = 23; - info->size = 0x00100000 * (sizeof (FPW) / 2); - break; /* => 1 or 2 MB */ - - case (FPW) INTEL_ID_28F800B3B: - info->flash_id += FLASH_INTEL800B; - info->sector_count = 23; - info->size = 0x00100000 * (sizeof (FPW) / 2); - break; /* => 1 or 2 MB */ - - case (FPW) INTEL_ID_28F160C3B: - info->flash_id += FLASH_28F160C3B; - info->sector_count = 39; - info->size = 0x00200000 * (sizeof (FPW) / 2); - break; /* => 2 or 4 MB */ - - case (FPW) INTEL_ID_28F160B3B: - info->flash_id += FLASH_INTEL160B; - info->sector_count = 39; - info->size = 0x00200000 * (sizeof (FPW) / 2); - break; /* => 2 or 4 MB */ - - case (FPW) INTEL_ID_28F320C3B: - info->flash_id += FLASH_28F320C3B; - info->sector_count = 71; - info->size = 0x00400000 * (sizeof (FPW) / 2); - break; /* => 4 or 8 MB */ - - case (FPW) INTEL_ID_28F320B3B: - info->flash_id += FLASH_INTEL320B; - info->sector_count = 71; - info->size = 0x00400000 * (sizeof (FPW) / 2); - break; /* => 4 or 8 MB */ - - case (FPW) INTEL_ID_28F640C3B: - info->flash_id += FLASH_28F640C3B; - info->sector_count = 135; - info->size = 0x00800000 * (sizeof (FPW) / 2); - break; /* => 8 or 16 MB */ - - case (FPW) INTEL_ID_28F640B3B: - info->flash_id += FLASH_INTEL640B; - info->sector_count = 135; - info->size = 0x00800000 * (sizeof (FPW) / 2); - break; /* => 8 or 16 MB */ - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - return (0); /* => no or unknown flash */ - } - - flash_get_offsets((ulong) addr, info); - - /* Put FLASH back in read mode */ - flash_reset(info); - - return (info->size); -} -#endif /* 0 */ - -#ifdef CONFIG_SYS_FLASH_PROTECTION -/*----------------------------------------------------------------------- - */ - -static void -flash_sync_real_protect(flash_info_t * info) -{ - FPWV *addr = (FPWV *) (info->start[0]); - FPWV *sect; - int i; - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_28F800C3B: - case FLASH_28F800C3T: - case FLASH_28F160C3B: - case FLASH_28F160C3T: - case FLASH_28F320C3B: - case FLASH_28F320C3T: - case FLASH_28F640C3B: - case FLASH_28F640C3T: - /* check for protected sectors */ - *addr = (FPW) 0x00900090; - for (i = 0; i < info->sector_count; i++) { - /* read sector protection at sector address, (A7 .. A0) = 0x02. - * D0 = 1 for each device if protected. - * If at least one device is protected the sector is marked - * protected, but mixed protected and unprotected devices - * within a sector should never happen. - */ - sect = (FPWV *) (info->start[i]); - info->protect[i] = - (sect[2] & (FPW) (0x00010001)) ? 1 : 0; - } - - /* Put FLASH back in read mode */ - flash_reset(info); - break; - - case FLASH_AM640U: - default: - /* no hardware protect that we support */ - break; - } -} -#endif - -/*----------------------------------------------------------------------- - */ - -int -flash_erase(flash_info_t * info, int s_first, int s_last) -{ - FPWV *addr; - int flag, prot, sect; - int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL; - ulong start, now, last; - int rcode = 0; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf("- missing\n"); - } else { - printf("- no sectors to erase\n"); - } - return 1; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_INTEL800B: - case FLASH_INTEL160B: - case FLASH_INTEL320B: - case FLASH_INTEL640B: - case FLASH_28F800C3B: - case FLASH_28F160C3B: - case FLASH_28F320C3B: - case FLASH_28F640C3B: - case FLASH_AM640U: - break; - case FLASH_UNKNOWN: - default: - printf("Can't erase unknown flash type %08lx - aborted\n", - info->flash_id); - return 1; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) { - printf("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf("\n"); - } - - start = get_timer(0); - last = start; - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last && rcode == 0; sect++) { - - if (info->protect[sect] != 0) /* protected, skip it */ - continue; - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - addr = (FPWV *) (info->start[sect]); - if (intel) { - *addr = (FPW) 0x00500050; /* clear status register */ - *addr = (FPW) 0x00200020; /* erase setup */ - *addr = (FPW) 0x00D000D0; /* erase confirm */ - } else { - /* must be AMD style if not Intel */ - FPWV *base; /* first address in bank */ - - base = (FPWV *) (info->start[0]); - base[0x0555] = (FPW) 0x00AA00AA; /* unlock */ - base[0x02AA] = (FPW) 0x00550055; /* unlock */ - base[0x0555] = (FPW) 0x00800080; /* erase mode */ - base[0x0555] = (FPW) 0x00AA00AA; /* unlock */ - base[0x02AA] = (FPW) 0x00550055; /* unlock */ - *addr = (FPW) 0x00300030; /* erase sector */ - } - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - /* wait at least 50us for AMD, 80us for Intel. - * Let's wait 1 ms. - */ - udelay(1000); - - while ((*addr & (FPW) 0x00800080) != (FPW) 0x00800080) { - if ((now = get_timer(0)) - start > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf("Timeout\n"); - - if (intel) { - /* suspend erase */ - *addr = (FPW) 0x00B000B0; - } - - flash_reset(info); /* reset to read mode */ - rcode = 1; /* failed */ - break; - } - - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - putc('.'); - last = now; - } - } - - flash_reset(info); /* reset to read mode */ - } - - printf(" done\n"); - return rcode; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -int -bad_write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */ - int bytes; /* number of bytes to program in current word */ - int left; /* number of bytes left to program */ - int i, res; - - for (left = cnt, res = 0; - left > 0 && res == 0; - addr += sizeof (data), left -= sizeof (data) - bytes) { - - bytes = addr & (sizeof (data) - 1); - addr &= ~(sizeof (data) - 1); - - /* combine source and destination data so can program - * an entire word of 16 or 32 bits - */ - for (i = 0; i < sizeof (data); i++) { - data <<= 8; - if (i < bytes || i - bytes >= left) - data += *((uchar *) addr + i); - else - data += *src++; - } - - /* write one word to the flash */ - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_AMD: - res = write_word_amd(info, (FPWV *) addr, data); - break; - case FLASH_MAN_INTEL: - res = write_word_intel(info, (FPWV *) addr, data); - break; - default: - /* unknown flash type, error! */ - printf("missing or unknown FLASH type\n"); - res = 1; /* not really a timeout, but gives error */ - break; - } - } - - return (res); -} - -/** - * write_buf: - Copy memory to flash. - * - * @param info: - * @param src: source of copy transaction - * @param addr: where to copy to - * @param cnt: number of bytes to copy - * - * @return error code - */ - -int -write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - ulong cp, wp; - FPW data; - int l; - int i, rc; - - wp = (addr & ~1); /* get lower word aligned address */ - - /* handle unaligned start bytes */ - if ((l = addr - wp) != 0) { - data = 0; - for (i = 0, cp = wp; i < l; ++i, ++cp) { - data = (data >> 8) | (*(uchar *) cp << 8); - } - for (; i < 2 && cnt > 0; ++i) { - data = (data >> 8) | (*src++ << 8); - --cnt; - ++cp; - } - for (; cnt == 0 && i < 2; ++i, ++cp) { - data = (data >> 8) | (*(uchar *) cp << 8); - } - - if ((rc = write_word(info, (FPWV *)wp, data)) != 0) { - return (rc); - } - wp += 2; - } - - /* handle word aligned part */ - while (cnt >= 2) { - /* data = *((vushort*)src); */ - data = *((FPW *) src); - if ((rc = write_word(info, (FPWV *)wp, data)) != 0) { - return (rc); - } - src += sizeof (FPW); - wp += sizeof (FPW); - cnt -= sizeof (FPW); - } - - if (cnt == 0) - return ERR_OK; - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) { - data = (data >> 8) | (*src++ << 8); - --cnt; - } - for (; i < 2; ++i, ++cp) { - data = (data >> 8) | (*(uchar *) cp << 8); - } - - return write_word(info, (FPWV *)wp, data); -} - -/*----------------------------------------------------------------------- - * Write a word to Flash for AMD FLASH - * A word is 16 or 32 bits, whichever the bus width of the flash bank - * (not an individual chip) is. - * - * returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int -write_word_amd(flash_info_t * info, FPWV * dest, FPW data) -{ - ulong start; - int flag; - int res = 0; /* result, assume success */ - FPWV *base; /* first address in flash bank */ - - /* Check if Flash is (sufficiently) erased */ - if ((*dest & data) != data) { - return (2); - } - - base = (FPWV *) (info->start[0]); - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - base[0x0555] = (FPW) 0x00AA00AA; /* unlock */ - base[0x02AA] = (FPW) 0x00550055; /* unlock */ - base[0x0555] = (FPW) 0x00A000A0; /* selects program mode */ - - *dest = data; /* start programming the data */ - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - start = get_timer(0); - - /* data polling for D7 */ - while (res == 0 - && (*dest & (FPW) 0x00800080) != (data & (FPW) 0x00800080)) { - if (get_timer(0) - start > CONFIG_SYS_FLASH_WRITE_TOUT) { - *dest = (FPW) 0x00F000F0; /* reset bank */ - printf("SHA timeout\n"); - res = 1; - } - } - - return (res); -} - -/*----------------------------------------------------------------------- - * Write a word to Flash for Intel FLASH - * A word is 16 or 32 bits, whichever the bus width of the flash bank - * (not an individual chip) is. - * - * returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int -write_word_intel(flash_info_t * info, FPWV * dest, FPW data) -{ - ulong start; - int flag; - int res = 0; /* result, assume success */ - - /* Check if Flash is (sufficiently) erased */ - if ((*dest & data) != data) { - return (2); - } - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - *dest = (FPW) 0x00500050; /* clear status register */ - *dest = (FPW) 0x00FF00FF; /* make sure in read mode */ - *dest = (FPW) 0x00400040; /* program setup */ - - *dest = data; /* start programming the data */ - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - start = get_timer(0); - - while (res == 0 && (*dest & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - *dest = (FPW) 0x00B000B0; /* Suspend program */ - res = 1; - } - } - - if (res == 0 && (*dest & (FPW) 0x00100010)) - res = 1; /* write failed, time out error is close enough */ - - *dest = (FPW) 0x00500050; /* clear status register */ - *dest = (FPW) 0x00FF00FF; /* make sure in read mode */ - - return (res); -} - -#ifdef CONFIG_SYS_FLASH_PROTECTION -/*----------------------------------------------------------------------- - */ -int -flash_real_protect(flash_info_t * info, long sector, int prot) -{ - int rcode = 0; /* assume success */ - FPWV *addr; /* address of sector */ - FPW value; - - addr = (FPWV *) (info->start[sector]); - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_28F800C3B: - case FLASH_28F800C3T: - case FLASH_28F160C3B: - case FLASH_28F160C3T: - case FLASH_28F320C3B: - case FLASH_28F320C3T: - case FLASH_28F640C3B: - case FLASH_28F640C3T: - flash_reset(info); /* make sure in read mode */ - *addr = (FPW) 0x00600060L; /* lock command setup */ - if (prot) - *addr = (FPW) 0x00010001L; /* lock sector */ - else - *addr = (FPW) 0x00D000D0L; /* unlock sector */ - flash_reset(info); /* reset to read mode */ - - /* now see if it really is locked/unlocked as requested */ - *addr = (FPW) 0x00900090; - /* read sector protection at sector address, (A7 .. A0) = 0x02. - * D0 = 1 for each device if protected. - * If at least one device is protected the sector is marked - * protected, but return failure. Mixed protected and - * unprotected devices within a sector should never happen. - */ - value = addr[2] & (FPW) 0x00010001; - if (value == 0) - info->protect[sector] = 0; - else if (value == (FPW) 0x00010001) - info->protect[sector] = 1; - else { - /* error, mixed protected and unprotected */ - rcode = 1; - info->protect[sector] = 1; - } - if (info->protect[sector] != prot) - rcode = 1; /* failed to protect/unprotect as requested */ - - /* reload all protection bits from hardware for now */ - flash_sync_real_protect(info); - break; - - case FLASH_AM640U: - default: - /* no hardware protect that we support */ - info->protect[sector] = prot; - break; - } - - return rcode; -} -#endif diff --git a/board/mx1fs2/intel.h b/board/mx1fs2/intel.h deleted file mode 100644 index 8db5dd4..0000000 --- a/board/mx1fs2/intel.h +++ /dev/null @@ -1,99 +0,0 @@ -/* - * Copyright (C) 2002 ETC s.r.o. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the ETC s.r.o. nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Written by Marcel Telka marcel@telka.sk, 2002. - * - * Documentation: - * [1] Intel Corporation, "3 Volt Intel Strata Flash Memory 28F128J3A, 28F640J3A, - * 28F320J3A (x8/x16)", April 2002, Order Number: 290667-011 - * [2] Intel Corporation, "3 Volt Synchronous Intel Strata Flash Memory 28F640K3, 28F640K18, - * 28F128K3, 28F128K18, 28F256K3, 28F256K18 (x16)", June 2002, Order Number: 290737-005 - * - * This file is taken from OpenWinCE project hosted by SourceForge.net - * - */ - -#ifndef FLASH_INTEL_H -#define FLASH_INTEL_H - -#include <common.h> - -/* Intel CFI commands - see Table 4. in [1] and Table 3. in [2] */ - -#define CFI_INTEL_CMD_READ_ARRAY 0xFF /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_READ_IDENTIFIER 0x90 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_READ_QUERY 0x98 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_READ_STATUS_REGISTER 0x70 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_CLEAR_STATUS_REGISTER 0x50 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_PROGRAM1 0x40 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_PROGRAM2 0x10 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_WRITE_TO_BUFFER 0xE8 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_CONFIRM 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_BLOCK_ERASE 0x20 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_SUSPEND 0xB0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_RESUME 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_LOCK_SETUP 0x60 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_LOCK_BLOCK 0x01 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_UNLOCK_BLOCK 0xD0 /* 28FxxxJ3A - unlocks all blocks, 28FFxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_LOCK_DOWN_BLOCK 0x2F /* 28FxxxK3, 28FxxxK18 */ - -/* Intel CFI Status Register bits - see Table 6. in [1] and Table 7. in [2] */ - -#define CFI_INTEL_SR_READY 1 << 7 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_SR_ERASE_SUSPEND 1 << 6 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_SR_ERASE_ERROR 1 << 5 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_SR_PROGRAM_ERROR 1 << 4 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_SR_VPEN_ERROR 1 << 3 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_SR_PROGRAM_SUSPEND 1 << 2 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_SR_BLOCK_LOCKED 1 << 1 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_SR_BEFP 1 << 0 /* 28FxxxK3, 28FxxxK18 */ - -/* Intel flash device ID codes for 28FxxxJ3A - see Table 5. in [1] */ - -#define CFI_CHIP_INTEL_28F320J3A 0x0016 -#define CFI_CHIPN_INTEL_28F320J3A "28F320J3A" -#define CFI_CHIP_INTEL_28F640J3A 0x0017 -#define CFI_CHIPN_INTEL_28F640J3A "28F640J3A" -#define CFI_CHIP_INTEL_28F128J3A 0x0018 -#define CFI_CHIPN_INTEL_28F128J3A "28F128J3A" - -/* Intel flash device ID codes for 28FxxxK3 and 28FxxxK18 - see Table 8. in [2] */ - -#define CFI_CHIP_INTEL_28F640K3 0x8801 -#define CFI_CHIPN_INTEL_28F640K3 "28F640K3" -#define CFI_CHIP_INTEL_28F128K3 0x8802 -#define CFI_CHIPN_INTEL_28F128K3 "28F128K3" -#define CFI_CHIP_INTEL_28F256K3 0x8803 -#define CFI_CHIPN_INTEL_28F256K3 "28F256K3" -#define CFI_CHIP_INTEL_28F640K18 0x8805 -#define CFI_CHIPN_INTEL_28F640K18 "28F640K18" -#define CFI_CHIP_INTEL_28F128K18 0x8806 -#define CFI_CHIPN_INTEL_28F128K18 "28F128K18" -#define CFI_CHIP_INTEL_28F256K18 0x8807 -#define CFI_CHIPN_INTEL_28F256K18 "28F256K18" - -#endif /* FLASH_INTEL_H */ diff --git a/board/mx1fs2/lowlevel_init.S b/board/mx1fs2/lowlevel_init.S deleted file mode 100644 index 56a4819..0000000 --- a/board/mx1fs2/lowlevel_init.S +++ /dev/null @@ -1,188 +0,0 @@ -/* - * Copyright (C) 2004 Sascha Hauer, Pengutronix - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA - * 02111-1307, USA. - * - */ - -#include <config.h> -#include <version.h> -#include <asm/arch/imx-regs.h> - -.globl lowlevel_init -lowlevel_init: - - mov r10, lr - -/* Change PERCLK1DIV to 14 ie 14+1 */ - ldr r0, =PCDR - ldr r1, =CONFIG_SYS_PCDR_VAL - str r1, [r0] - -/* set MCU PLL Control Register 0 */ - - ldr r0, =MPCTL0 - ldr r1, =CONFIG_SYS_MPCTL0_VAL - str r1, [r0] - -/* set MCU PLL Control Register 1 */ - - ldr r0, =MPCTL1 - ldr r1, =CONFIG_SYS_MPCTL1_VAL - str r1, [r0] - -/* set mpll restart bit */ - ldr r0, =CSCR - ldr r1, [r0] - orr r1,r1,#(1<<21) - str r1, [r0] - - mov r2,#0x10 -1: - mov r3,#0x2000 -2: - subs r3,r3,#1 - bne 2b - - subs r2,r2,#1 - bne 1b - -/* set System PLL Control Register 0 */ - - ldr r0, =SPCTL0 - ldr r1, =CONFIG_SYS_SPCTL0_VAL - str r1, [r0] - -/* set System PLL Control Register 1 */ - - ldr r0, =SPCTL1 - ldr r1, =CONFIG_SYS_SPCTL1_VAL - str r1, [r0] - -/* set spll restart bit */ - ldr r0, =CSCR - ldr r1, [r0] - orr r1,r1,#(1<<22) - str r1, [r0] - - mov r2,#0x10 -1: - mov r3,#0x2000 -2: - subs r3,r3,#1 - bne 2b - - subs r2,r2,#1 - bne 1b - - ldr r0, =CSCR - ldr r1, =CONFIG_SYS_CSCR_VAL - str r1, [r0] - - ldr r0, =GPCR - ldr r1, =CONFIG_SYS_GPCR_VAL - str r1, [r0] - -/* - * I have now read the ARM920 DataSheet back-to-Back, and have stumbled upon - * this..... - * - * It would appear that from a Cold-Boot the ARM920T enters "FastBus" mode CP15 - * register 1, this stops it using the output of the PLL and thus runs at the - * slow rate. Unless you place the Core into "Asynch" mode, the CPU will never - * use the value set in the CM_OSC registers...regardless of what you set it - * too! Thus, although i thought i was running at 140MHz, i'm actually running - * at 40!.. - * - * Slapping this into my bootloader does the trick... - * - * MRC p15,0,r0,c1,c0,0 ; read core configuration register - * ORR r0,r0,#0xC0000000 ; set asynchronous clocks and not fastbus mode - * MCR p15,0,r0,c1,c0,0 ; write modified value to core configuration - * register - * - */ - MRC p15,0,r0,c1,c0,0 -/* ORR r0,r0,#0xC0000000 async mode */ -/* ORR r0,r0,#0x40000000 sync mode */ - ORR r0,r0,#0xC0000000 - MCR p15,0,r0,c1,c0,0 - - ldr r0, =GIUS(0) - ldr r1, =CONFIG_SYS_GIUS_A_VAL - str r1, [r0] - - ldr r0, =FMCR - ldr r1, =CONFIG_SYS_FMCR_VAL - str r1, [r0] - - ldr r0, =CS0U - ldr r1, =CONFIG_SYS_CS0U_VAL - str r1, [r0] - - ldr r0, =CS0L - ldr r1, =CONFIG_SYS_CS0L_VAL - str r1, [r0] - - ldr r0, =CS1U - ldr r1, =CONFIG_SYS_CS1U_VAL - str r1, [r0] - - ldr r0, =CS1L - ldr r1, =CONFIG_SYS_CS1L_VAL - str r1, [r0] - - ldr r0, =CS4U - ldr r1, =CONFIG_SYS_CS4U_VAL - str r1, [r0] - - ldr r0, =CS4L - ldr r1, =CONFIG_SYS_CS4L_VAL - str r1, [r0] - - ldr r0, =CS5U - ldr r1, =CONFIG_SYS_CS5U_VAL - str r1, [r0] - - ldr r0, =CS5L - ldr r1, =CONFIG_SYS_CS5L_VAL - str r1, [r0] - -/* SDRAM Setup */ - - ldr r1,=0x00221000 /* adr of SDCTRL0 */ - ldr r0,=0x92120200 - str r0,[r1,#0] /* put in precharge command mode */ - ldr r2,=0x08200000 /* adr for precharge cmd */ - ldr r0,[r2,#0] /* precharge */ - ldr r0,=0xA2120200 - ldr r2,=0x08000000 /* start of SDRAM */ - str r0,[r1,#0] /* put in auto-refresh mode */ - ldr r0,[r2,#0] /* auto-refresh */ - ldr r0,[r2,#0] /* auto-refresh */ - ldr r0,[r2,#0] /* auto-refresh */ - ldr r0,[r2,#0] /* auto-refresh */ - ldr r0,[r2,#0] /* auto-refresh */ - ldr r0,[r2,#0] /* auto-refresh */ - ldr r0,[r2,#0] /* auto-refresh */ - ldr r0,=0xB2120200 - ldr r2,=0x08111800 - str r0,[r1,#0] /* setup for mode register of SDRAM */ - ldr r0,[r2,#0] /* program mode register */ - ldr r0,=0x82124267 - str r0,[r1,#0] /* back to normal operation */ - - mov pc,r10 diff --git a/board/mx1fs2/mx1fs2.c b/board/mx1fs2/mx1fs2.c deleted file mode 100644 index 90a33c2..0000000 --- a/board/mx1fs2/mx1fs2.c +++ /dev/null @@ -1,122 +0,0 @@ -/* - * Copyright (C) 2004 Sascha Hauer, Pengutronix - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#include <common.h> -#include <asm/arch/imx-regs.h> - -DECLARE_GLOBAL_DATA_PTR; - -#define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg) - -extern void imx_gpio_mode(int gpio_mode); - -static void logo_init(void) -{ - imx_gpio_mode(PD15_PF_LD0); - imx_gpio_mode(PD16_PF_LD1); - imx_gpio_mode(PD17_PF_LD2); - imx_gpio_mode(PD18_PF_LD3); - imx_gpio_mode(PD19_PF_LD4); - imx_gpio_mode(PD20_PF_LD5); - imx_gpio_mode(PD21_PF_LD6); - imx_gpio_mode(PD22_PF_LD7); - imx_gpio_mode(PD23_PF_LD8); - imx_gpio_mode(PD24_PF_LD9); - imx_gpio_mode(PD25_PF_LD10); - imx_gpio_mode(PD26_PF_LD11); - imx_gpio_mode(PD27_PF_LD12); - imx_gpio_mode(PD28_PF_LD13); - imx_gpio_mode(PD29_PF_LD14); - imx_gpio_mode(PD30_PF_LD15); - imx_gpio_mode(PD14_PF_FLM_VSYNC); - imx_gpio_mode(PD13_PF_LP_HSYNC); - imx_gpio_mode(PD6_PF_LSCLK); - imx_gpio_mode(GPIO_PORTD | GPIO_OUT | GPIO_DR); - imx_gpio_mode(PD11_PF_CONTRAST); - imx_gpio_mode(PD10_PF_SPL_SPR); - - LCDC_RMCR = 0x00000000; - LCDC_PCR = PCR_COLOR | PCR_PBSIZ_8 | PCR_BPIX_16 | PCR_PCD(5); - LCDC_HCR = HCR_H_WIDTH(2); - LCDC_VCR = VCR_V_WIDTH(2); - - LCDC_PWMR = 0x00000380; /* contrast to 0x80 middle (is best !!!) */ - LCDC_SSA = 0x10040000; /* image in flash */ - - LCDC_SIZE = SIZE_XMAX(320) | SIZE_YMAX(240); /* screen size */ - - LCDC_VPW = 0x000000A0; /* Virtual Page Width Register */ - LCDC_POS = 0x00000000; /* panning offset 0 (0 pixel offset) */ - - /* disable Cursor */ - LCDC_CPOS = 0x00000000; - - /* fixed burst length */ - LCDC_DMACR = DMACR_BURST | DMACR_HM(8) | DMACR_TM(2); - - /* enable LCD */ - DR(3) |= 0x00001000; - LCDC_RMCR = RMCR_LCDC_EN; - -} - -int -board_init(void) -{ - gd->bd->bi_arch_number = MACH_TYPE_MX1FS2; - gd->bd->bi_boot_params = 0x08000100; -serial_init(); - logo_init(); - return 0; -} - -int -dram_init(void) -{ -#if ( CONFIG_NR_DRAM_BANKS > 0 ) - gd->bd->bi_dram[0].start = MX1FS2_SDRAM_1; - gd->bd->bi_dram[0].size = MX1FS2_SDRAM_1_SIZE; -#endif - return 0; -} - -/** - * show_boot_progress: - indicate state of the boot process - * - * @param status: Status number - see README for details. - * - */ - -void -show_boot_progress(int status) -{ - /* We use this as a hook to disable serial ports just before booting - * This way we suppress the "uncompressing linux..." message - */ -#ifdef CONFIG_SILENT_CONSOLE - if( status == 8) { - if( getenv("silent") != NULL ) { - *(volatile unsigned long *)0x206080 &= ~1; - *(volatile unsigned long *)0x207080 &= ~1; - } - } -#endif - return; -} diff --git a/boards.cfg b/boards.cfg index 54ff361..39b9199 100644 --- a/boards.cfg +++ b/boards.cfg @@ -63,7 +63,6 @@ kb9202 arm arm920t - - m501sk arm arm920t - - at91rm9200 at91rm9200dk arm arm920t - atmel at91rm9200 mx1ads arm arm920t - - imx -mx1fs2 arm arm920t - - imx scb9328 arm arm920t - - imx cm4008 arm arm920t - - ks8695 cm41xx arm arm920t - - ks8695 diff --git a/doc/README.scrapyard b/doc/README.scrapyard index d6c47fa..85d84d7 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -11,6 +11,7 @@ easily if here is something they might want to dig for...
Board Arch CPU removed Commit last known maintainer/contact ============================================================================= +mx1fs2 arm arm920t - 2011-07-17 lpd7a404 arm lh7a40x - 2011-07-17 edb9301 arm arm920t - 2011-07-17 edb9302 arm arm920t - 2011-07-17 diff --git a/include/configs/mx1fs2.h b/include/configs/mx1fs2.h deleted file mode 100644 index ddbc65a..0000000 --- a/include/configs/mx1fs2.h +++ /dev/null @@ -1,305 +0,0 @@ -/* - * Copyright (C) 2004 Sascha Hauer, Pengutronix - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_ARM920T 1 /* this is an ARM920T CPU */ -#define CONFIG_IMX 1 /* in a Motorola MC9328MXL Chip */ -#define CONFIG_MX1FS2 1 /* on a mx1fs2 board */ -#undef CONFIG_USE_IRQ /* don't need use IRQ/FIQ */ - -/* - * Select serial console configuration - */ -#undef _CONFIG_UART1 /* internal uart 1 */ -#define _CONFIG_UART2 /* internal uart 2 */ -#undef _CONFIG_UART3 /* internal uart 3 */ -#undef _CONFIG_UART4 /* internal uart 4 */ -#undef CONFIG_SILENT_CONSOLE /* use this to disable output */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_JFFS2 - -#undef CONFIG_CMD_CONSOLE -#undef CONFIG_CMD_DHCP -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_PING -#undef CONFIG_CMD_SOURCE - -/* - * Boot options. Setting delay to -1 stops autostart count down. - */ -#define CONFIG_BOOTDELAY 10 -#define CONFIG_BOOTARGS "root=/dev/mtdblock4 console=ttySMX0,115200n8 rootfstype=jffs2" -#define CONFIG_BOOTCOMMAND "bootm 10080000" -#define CONFIG_SHOW_BOOT_PROGRESS - -/* - * General options for u-boot. Modify to save memory foot print - */ -#define CONFIG_SYS_LONGHELP /* undef saves memory */ -#define CONFIG_SYS_PROMPT "mx1fs2> " /* prompt string */ -#define CONFIG_SYS_CBSIZE 256 /* console I/O buffer */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* print buffer size */ -#define CONFIG_SYS_MAXARGS 16 /* max command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* boot args buf size */ - -#define CONFIG_SYS_MEMTEST_START 0x08100000 /* memtest test area */ -#define CONFIG_SYS_MEMTEST_END 0x08F00000 - -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ -#define CONFIG_SYS_CPUSPEED 0x141 /* core clock - register value */ - -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -#define CONFIG_BAUDRATE 115200 -/* - * Definitions related to passing arguments to kernel. - */ -#define CONFIG_CMDLINE_TAG 1 /* send commandline to Kernel */ -#define CONFIG_SETUP_MEMORY_TAGS 1 /* send memory definition to kernel */ -#define CONFIG_INITRD_TAG 1 /* send initrd params */ - -/* - * Malloc pool need to host env + 128 Kb reserve for other allocations. - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128<<10) ) - -#define CONFIG_STACKSIZE (120<<10) /* stack size */ - -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4<<10) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4<<10) /* FIQ stack */ -#endif - -/* SDRAM Setup Values - * 0x910a8300 Precharge Command CAS 3 - * 0x910a8200 Precharge Command CAS 2 - * - * 0xa10a8300 AutoRefresh Command CAS 3 - * 0xa10a8200 Set AutoRefresh Command CAS 2 - */ -#define PRECHARGE_CMD 0x910a8300 -#define AUTOREFRESH_CMD 0xa10a8300 - -#define BUS32BIT_VERSION -/* - * SDRAM Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SDRAM */ -#define MX1FS2_SDRAM_1 0x08000000 /* SDRAM bank #1 */ -#ifdef BUS32BIT_VERSION -#define MX1FS2_SDRAM_1_SIZE (0x04000000 - 0x100000) /* 64 MB - 1M Framebuffer */ -#else -#define MX1FS2_SDRAM_1_SIZE (0x01FC0000 - 0x100000) /* 32 MB - 1M Framebuffer */ -#endif -/* - * Flash Controller settings - */ - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* FLASH banks count (not chip count)*/ -#define CONFIG_SYS_MAX_FLASH_SECT 256 /* number of sector in FLASH bank */ - -#ifdef BUS32BIT_VERSION -#define MX1FS2_FLASH_BUS_WIDTH 4 /* we use 32 bit FLASH memory... */ -#define MX1FS2_FLASH_INTERLEAVE 2 /* ... made of 2 chips */ -#define MX1FS2_FLASH_BANK_SIZE 0x02000000 /* size of one flash bank*/ -#define MX1FS2_FLASH_SECT_SIZE 0x00020000 /* size of erase sector */ -#else -#define MX1FS2_FLASH_BUS_WIDTH 2 /* we use 16 bit FLASH memory... */ -#define MX1FS2_FLASH_INTERLEAVE 1 /* ... made of 1 chip */ -#define MX1FS2_FLASH_BANK_SIZE 0x01000000 /* size of one flash bank*/ -#define MX1FS2_FLASH_SECT_SIZE 0x00010000 /* size of erase sector */ -#endif -#define MX1FS2_FLASH_BASE 0x10000000 /* location of flash memory */ -#define MX1FS2_FLASH_UNLOCK 1 /* perform hw unlock first */ - -/* This should be defined if CFI FLASH device is present. Actually benefit - is not so clear to me. In other words we can provide more informations - to user, but this expects more complex flash handling we do not provide - now.*/ -#undef CONFIG_SYS_FLASH_CFI - -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* timeout for Erase operation */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* timeout for Write operation */ - -#define CONFIG_SYS_FLASH_BASE MX1FS2_FLASH_BASE - -/* - * This is setting for JFFS2 support in u-boot. - * Right now there is no gain for user, but later on booting kernel might be - * possible. Consider using XIP kernel running from flash to save RAM - * footprint. - * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support. - */ - -/* - * JFFS2 partitions - */ -/* No command line, one static partition, whole device */ -/* -#undef CONFIG_CMD_MTDPARTS -#define CONFIG_JFFS2_DEV "nor0" -#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF -#define CONFIG_JFFS2_PART_OFFSET 0x00050000 -*/ - -/* mtdparts command line support */ -/* Note: fake mtd_id used, no linux mtd map file */ -#define CONFIG_CMD_MTDPARTS -#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -#define CONFIG_FLASH_CFI_MTD -#define MTDIDS_DEFAULT "nor0=mx1fs2-0" - -#ifdef BUS32BIT_VERSION -#define MTDPARTS_DEFAULT "mtdparts=mx1fs2-0:2m@5m(part0),5m@9m(part1)" -#else -#define MTDPARTS_DEFAULT "mtdparts=mx1fs2-0:-@320k(jffs2)" -#endif - -/* - * Environment setup. Definitions of monitor location and size with - * definition of environment setup ends up in 2 possibilities. - * 1. Embeded environment - in u-boot code is space for environment - * 2. Environment is read from predefined sector of flash - * Right now we support 2. possiblity, but expecting no env placed - * on mentioned address right now. This also needs to provide whole - * sector for it - for us 256Kb is really waste of memory. U-boot uses - * default env. and until kernel parameters could be sent to kernel - * env. has no sense to us. - */ - -#define CONFIG_SYS_MONITOR_BASE 0x10000000 -#define CONFIG_SYS_MONITOR_LEN 0x20000 /* 128b ( 1 flash sector ) */ -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR 0x10020000 /* absolute address for now */ -#define CONFIG_ENV_SIZE 0x20000 - -#define CONFIG_ENV_OVERWRITE 1 /* env is not writable now */ - -/* Setup CS4 and CS5 */ -#define CONFIG_SYS_GIUS_A_VAL 0x0003fffe - -/* - * CSxU_VAL: - * 63| x x x x | x x x x | x x x x | x x x x | x x x x | x x x x | x x x x | x x x x|32 - * |DTACK_SEL|0|BCD | BCS | PSZ|PME|SYNC| DOL | CNC| WSC | 0| WWS | EDC | - * - * CSxL_VAL: - * 31| x x x x | x x x x | x x x x | x x x x | x x x x | x x x x | x x x x | x x x x| 0 - * | OEA | OEN | WEA | WEN | CSA |EBC| DSZ | 0|SP|0|WP| 0 0|PA|CSEN| - */ - -#define CONFIG_SYS_CS0U_VAL 0x00008C00 -#define CONFIG_SYS_CS0L_VAL 0x22222601 -#define CONFIG_SYS_CS1U_VAL 0x00008C00 -#define CONFIG_SYS_CS1L_VAL 0x22222301 -#define CONFIG_SYS_CS4U_VAL 0x00008C00 -#define CONFIG_SYS_CS4L_VAL 0x22222301 -#define CONFIG_SYS_CS5U_VAL 0x00008C00 -#define CONFIG_SYS_CS5L_VAL 0x22222301 - -/* f_{dpll}=2*f{ref}*(MFI+MFN/(MFD+1))/(PD+1) - f_ref=16,777MHz - - 0x002a141f: 191,9944MHz - 0x040b2007: 144MHz - 0x042a141f: 96MHz - 0x0811140d: 64MHz - 0x040e200e: 150MHz - 0x00321431: 200MHz - - 0x08001800: 64MHz mit 16er Quarz - 0x04001800: 96MHz mit 16er Quarz - 0x04002400: 144MHz mit 16er Quarz - - 31 |x x x x|x x x x|x x x x|x x x x|x x x x|x x x x|x x x x|x x x x| 0 - |XXX|--PD---|-------MFD---------|XXX|--MFI--|-----MFN-----------| */ - -#define CONFIG_SYS_MPCTL0_VAL 0x07E723AD -#define CONFIG_SYS_MPCTL1_VAL 0x00000040 -#define CONFIG_SYS_PCDR_VAL 0x00010005 -#define CONFIG_SYS_GPCR_VAL 0x00000FFB - -#define USE_16M_OSZI /* If you have one, you want to use it - The internal 32kHz oszillator jitters */ -#ifdef USE_16M_OSZI - -#define CONFIG_SYS_SPCTL0_VAL 0x04001401 -#define CONFIG_SYS_SPCTL1_VAL 0x0C000040 -#define CONFIG_SYS_CSCR_VAL 0x07030003 -#define CONFIG_SYS_CLK_FREQ 16780000 -#define CONFIG_SYSPLL_CLK_FREQ 16000000 - -#else - -#define CONFIG_SYS_SPCTL0_VAL 0x07E716D1 -#define CONFIG_SYS_CSCR_VAL 0x06000003 -#define CONFIG_SYS_CLK_FREQ 16780000 -#define CONFIG_SYSPLL_CLK_FREQ 16780000 - -#endif - -/* - * Well this has to be defined, but on the other hand it is used differently - * one may expect. For instance loadb command do not cares :-) - * So advice is - do not relay on this... - */ -#define CONFIG_SYS_LOAD_ADDR 0x08400000 - -#define CONFIG_SYS_FMCR_VAL 0x00000003 /* Reset Default */ - -/* Bit[0:3] contain PERCLK1DIV for UART 1 - 0x000b00b ->b<- -> 192MHz/12=16MHz - 0x000b00b ->8<- -> 144MHz/09=16MHz - 0x000b00b ->3<- -> 64MHz/4=16MHz */ - -#ifdef _CONFIG_UART1 -#define CONFIG_IMX_SERIAL -#define CONFIG_IMX_SERIAL1 -#elif defined _CONFIG_UART2 -#define CONFIG_IMX_SERIAL -#define CONFIG_IMX_SERIAL2 -#elif defined _CONFIG_UART3 | defined _CONFIG_UART4 -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_CLK 3686400 -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_CONS_INDEX 1 -#ifdef _CONFIG_UART3 -#define CONFIG_SYS_NS16550_COM1 0x15000000 -#elif defined _CONFIG_UART4 -#define CONFIG_SYS_NS16550_COM1 0x16000000 -#endif -#endif - -#endif /* __CONFIG_H */