Hi guys,
On Fri, 2014-09-19 at 04:32 -0500, Chin Liang See wrote:
Hi Marek,
On Wed, 2014-09-17 at 14:39 +0200, marex@denx.de wrote:
On Wednesday, September 17, 2014 at 02:00:42 PM, Chin Liang See wrote:
On Wed, 2014-09-17 at 13:52 +0200, marex@denx.de wrote:
On Wednesday, September 17, 2014 at 01:29:15 PM, Chin Liang See wrote:
- MMC is not enabled in SocFPGA.
I recall there is a patch from Pavel. I believe its pending for v2 due to some comments.
This should be in the tree in fact. Is CONFIG_CMD_MMC defined ?
I didn't see any MMC configuration at include/configs/socfpga_cyclone5 at mainline nor the new patch series. Wonder I might miss out any ACKed patch?
Oh I see. I have this enabled in the repository here, but I didn't submit that change since it needs more work. The code is there , added in the patch
arm: socfpga: misc: Add SD controller init
The change for the SoCFPGA config file is missing though.
Yup, I just submit the patch to add that "socfpga: Enable DWMMC for SOCFPGA". With this added, the SDMMC is working well at U-Boot. This including all the 35 patches from you. Something to cheer during the weekend :)
I just submitted a patch "socfpga: Enable SDMMC boot for SOCFPGA U-Boot". This will enable the SDMMC boot as default boot for Altera dev kit. With that, I am able to success boot till Linux 3.10 LTSi successfully :)
Thanks Chin Liang
U-Boot 2014.10-rc2-00126-g77676b6 (Sep 19 2014 - 05:28:06)
CPU: Altera SoCFPGA Platform BOARD: Altera SoCFPGA Cyclone5 Board DRAM: 1 GiB WARNING: Caches not enabled MMC: SOCFPGA DWMMC: 0 Using default environment
In: serial Out: serial Err: serial Net: dwmac.ff702000 Error: dwmac.ff702000 address not set.
Warning: Your board does not use generic board. Please read doc/README.generic-board and take action. Boards not upgraded by the late 2014 may break or be removed. Hit any key to stop autoboot: 0 reading zImage 3525736 bytes read in 196 ms (17.2 MiB/s) reading socfpga.dtb 19247 bytes read in 8 ms (2.3 MiB/s) Kernel image @ 0x007fc0 [ 0x000000 - 0x35cc68 ] ## Flattened Device Tree blob at 00000100 Booting using the fdt blob at 0x000100 Loading Device Tree to 0fff7000, end 0fffeb2e ... OK
Starting kernel ...
Booting Linux on physical CPU 0x0 Initializing cgroup subsys cpuset Linux version 3.10.31-ltsi (jdasilva@sj-interactive3) (gcc version 4.8.3 20140401 (prerelease) (crosstool-NG linaro-1.13.1-4.8-2014.04 - Linaro GCC 4.8-2014.04) ) #1 SMP Wed Sep 17 00:24:24 PDT 2014 CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=10c5387d CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache Machine: Altera SOCFPGA, model: Altera SOCFPGA Cyclone V Memory policy: ECC disabled, Data cache writealloc PERCPU: Embedded 8 pages/cpu @80f70000 s11200 r8192 d13376 u32768 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260096 Kernel command line: console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait PID hash table entries: 4096 (order: 2, 16384 bytes) Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) Memory: 1024MB = 1024MB total Memory: 1031884k/1031884k available, 16692k reserved, 0K highmem Virtual kernel memory layout: vector : 0xffff0000 - 0xffff1000 ( 4 kB) fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB) vmalloc : 0xc0800000 - 0xff000000 (1000 MB) lowmem : 0x80000000 - 0xc0000000 (1024 MB) modules : 0x7f000000 - 0x80000000 ( 16 MB) .text : 0x80008000 - 0x8068cab0 (6675 kB) .init : 0x8068d000 - 0x806e3bc0 ( 347 kB) .data : 0x806e4000 - 0x807204d0 ( 242 kB) .bss : 0x807204d0 - 0x80761cb4 ( 262 kB) SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 Hierarchical RCU implementation. NR_IRQS:16 nr_irqs:16 16 sched_clock: 32 bits at 100MHz, resolution 10ns, wraps every 42949ms Console: colour dummy device 80x30 Calibrating delay loop... 1836.64 BogoMIPS (lpj=9183232) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 512 CPU: Testing write buffer coherency: ok ftrace: allocating 17914 entries in 53 pages CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 Setting up static identity map for 0x804d39c8 - 0x804d3a20 CPU1: Booted secondary processor CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 Brought up 2 CPUs SMP: Total of 2 processors activated (3679.84 BogoMIPS). CPU: All CPU(s) started in SVC mode. devtmpfs: initialized NET: Registered protocol family 16 fpga bridge driver DMA: preallocated 256 KiB pool for atomic coherent allocations L310 cache controller enabled l2x0: 8 ways, CACHE_ID 0x410030c9, AUX_CTRL 0x32460000, Cache size: 524288 B syscon fffef000.l2-cache: regmap [mem 0xfffef000-0xfffeffff] registered syscon ffd05000.rstmgr: regmap [mem 0xffd05000-0xffd05fff] registered syscon ffc25000.sdrctl: regmap [mem 0xffc25000-0xffc25fff] registered syscon ff800000.l3regs: regmap [mem 0xff800000-0xff800fff] registered syscon ffd08000.sysmgr: regmap [mem 0xffd08000-0xffd0bfff] registered hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers. hw-breakpoint: maximum watchpoint size is 4 bytes. altera_hps2fpga_bridge fpgabridge.2: fpga bridge [hps2fpga] registered as device hps2fpga altera_hps2fpga_bridge fpgabridge.2: init-val not specified altera_hps2fpga_bridge fpgabridge.3: fpga bridge [lshps2fpga] registered as device lwhps2fpga altera_hps2fpga_bridge fpgabridge.3: init-val not specified altera_hps2fpga_bridge fpgabridge.4: fpga bridge [fpga2hps] registered as device fpga2hps altera_hps2fpga_bridge fpgabridge.4: init-val not specified bio: create slab <bio-0> at 0 FPGA Mangager framework driver SCSI subsystem initialized usbcore: registered new interface driver usbfs usbcore: registered new interface driver hub usbcore: registered new device driver usb lcd-comm 0-0028: LCD driver initialized pps_core: LinuxPPS API ver. 1 registered pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti giometti@linux.it PTP clock support registered Switching to clocksource timer0 NET: Registered protocol family 2 TCP established hash table entries: 8192 (order: 4, 65536 bytes) TCP bind hash table entries: 8192 (order: 4, 65536 bytes) TCP: Hash tables configured (established 8192 bind 8192) TCP: reno registered UDP hash table entries: 512 (order: 2, 16384 bytes) UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) NET: Registered protocol family 1 RPC: Registered named UNIX socket transport module. RPC: Registered udp transport module. RPC: Registered tcp transport module. RPC: Registered tcp NFSv4.1 backchannel transport module. hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available arm-pmu arm-pmu: PMU:CTI successfully enabled for 2 cores NFS: Registering the id_resolver key type Key type id_resolver registered Key type id_legacy registered NTFS driver 2.1.30 [Flags: R/W]. jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc. msgmni has been set to 2015 io scheduler noop registered (default) usbcore: registered new interface driver udlfb Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled ffc02000.serial0: ttyS0 at MMIO 0xffc02000 (irq = 194) is a 16550A console [ttyS0] enabled altera_fpga_manager ff706000.fpgamgr: fpga manager [Altera FPGA Manager] registered as minor 0 brd: module loaded at24 0-0051: 4096 byte 24c32 EEPROM, writable, 32 bytes/write cadence-qspi ff705000.spi: DMA NOT enabled cadence-qspi ff705000.spi: master is unqueued, this is deprecated m25p80 spi2.0: found n25q512a, expected n25q00 m25p80 spi2.0: n25q512a (65536 Kbytes) 2 ofpart partitions found on MTD device spi2.0 Creating 2 MTD partitions on "spi2.0": 0x000000000000-0x000000800000 : "Flash 0 Raw Data" 0x000000800000-0x000008000000 : "Flash 0 jffs2 Filesystem" mtd: partition "Flash 0 jffs2 Filesystem" extends beyond the end of device "spi2.0" -- size truncated to 0x3800000 cadence-qspi ff705000.spi: Cadence QSPI controller driver dw_spi_mmio fff00000.spi: master is unqueued, this is deprecated CAN device driver interface c_can_platform ffc00000.d_can: invalid resource c_can_platform ffc00000.d_can: control memory is not used for raminit c_can_platform ffc00000.d_can: c_can_platform device registered (regs=c08e4000, irq=163) stmmac - user ID: 0x10, Synopsys ID: 0x37 Ring mode enabled DMA HW capability register supported Enhanced/Alternate descriptors Enabled extended descriptors RX Checksum Offload Engine supported (type 2) TX Checksum insertion supported Enable RX Mitigation via HW Watchdog Timer libphy: stmmac: probed eth0: PHY ID 00221611 at 4 IRQ POLL (stmmac-1:04) active dwc2 ffb40000.usb: unable to find phy dwc2 ffb40000.usb: EPs:15 dwc2 ffb40000.usb: dedicated fifos dwc2 ffb40000.usb: 2560 invalid for host_rx_fifo_size. Check HW configuration. dwc2 ffb40000.usb: DWC OTG Controller dwc2 ffb40000.usb: new USB bus registered, assigned bus number 1 dwc2 ffb40000.usb: irq 160, io mem 0x00000000 usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 usb usb1: Product: DWC OTG Controller usb usb1: Manufacturer: Linux 3.10.31-ltsi dwc2_hsotg usb usb1: SerialNumber: ffb40000.usb hub 1-0:1.0: USB hub found hub 1-0:1.0: 1 port detected usbcore: registered new interface driver usb-storage mousedev: PS/2 mouse device common for all mice rtc-ds1307 0-0068: SET TIME! rtc-ds1307 0-0068: rtc core: registered ds1339 as rtc0 i2c /dev entries driver Synopsys Designware Multimedia Card Interface Driver dwmmc_socfpga ff704000.dwmmc0: couldn't determine pwr-en, assuming pwr-en = 0 dwmmc_socfpga ff704000.dwmmc0: Using internal DMA controller. dwmmc_socfpga ff704000.dwmmc0: Version ID is 240a dwmmc_socfpga ff704000.dwmmc0: DW MMC controller at irq 171, 32 bit host data width, 1024 deep fifo mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 400000Hz, actual 396825HZ div = 63) dwmmc_socfpga ff704000.dwmmc0: 1 slots initialized ledtrig-cpu: registered to indicate activity on CPUs usbcore: registered new interface driver usbhid usbhid: USB HID core driver oprofile: using arm/armv7-ca9 TCP: cubic registered NET: Registered protocol family 10 sit: IPv6 over IPv4 tunneling driver NET: Registered protocol family 17 NET: Registered protocol family 15 can: controller area network core (rev 20120528 abi 9) NET: Registered protocol family 29 can: raw protocol (rev 20120528) can: broadcast manager protocol (rev 20120528 t) can: netlink gateway (rev 20130117) max_hops=1 8021q: 802.1Q VLAN Support v1.8 Key type dns_resolver registered VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4 ThumbEE CPU extension supported. Registering SWP/SWPB emulation handler Waiting for root device /dev/mmcblk0p2... mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 50000000Hz, actual 50000000HZ div = 0) mmc0: new high speed SDHC card at address 0007 mmcblk0: mmc0:0007 SD4GB 3.70 GiB mmcblk0: p1 p2 p3 EXT2-fs (mmcblk0p2): warning: mounting unchecked fs, running e2fsck is recommended VFS: Mounted root (ext2 filesystem) on device 179:2. devtmpfs: mounted Freeing unused kernel memory: 344K (8068d000 - 806e3000) Initializing random number generator... done. Starting network...
Welcome to Altera SOCFPGA5XS1 Altera_SOCFPGA5XS1 login: root # cat /proc/cpuinfo processor : 0 model name : ARMv7 Processor rev 0 (v7l) BogoMIPS : 1836.64 Features : swp half thumb fastmult vfp edsp thumbee neon vfpv3 tls lpae CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x3 CPU part : 0xc09 CPU revision : 0
processor : 1 model name : ARMv7 Processor rev 0 (v7l) BogoMIPS : 1843.20 Features : swp half thumb fastmult vfp edsp thumbee neon vfpv3 tls lpae CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x3 CPU part : 0xc09 CPU revision : 0
Hardware : Altera SOCFPGA Revision : 0000 Serial : 0000000000000000 #