This matches the naming scheme of other timer drivers.
Signed-off-by: Sean Anderson seanga2@gmail.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Rick Chen rick@andestech.com ---
(no changes since v1)
arch/riscv/cpu/ax25/Kconfig | 2 +- drivers/timer/Kconfig | 2 +- drivers/timer/Makefile | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/cpu/ax25/Kconfig b/arch/riscv/cpu/ax25/Kconfig index 5cb5bb51eb..327b74e20a 100644 --- a/arch/riscv/cpu/ax25/Kconfig +++ b/arch/riscv/cpu/ax25/Kconfig @@ -5,7 +5,7 @@ config RISCV_NDS imply CPU_RISCV imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE) imply ANDES_PLIC if (RISCV_MMODE || SPL_RISCV_MMODE) - imply ANDES_PLMT if (RISCV_MMODE || SPL_RISCV_MMODE) + imply ANDES_PLMT_TIMER if (RISCV_MMODE || SPL_RISCV_MMODE) imply SPL_CPU_SUPPORT imply SPL_OPENSBI imply SPL_LOAD_FIT diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index 6b8e4c9dc0..80743a2551 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -53,7 +53,7 @@ config ALTERA_TIMER Select this to enable a timer for Altera devices. Please find details on the "Embedded Peripherals IP User Guide" of Altera.
-config ANDES_PLMT +config ANDES_PLMT_TIMER bool depends on RISCV_MMODE || SPL_RISCV_MMODE help diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile index dd4f9cc1d4..226227c8ec 100644 --- a/drivers/timer/Makefile +++ b/drivers/timer/Makefile @@ -5,7 +5,7 @@ obj-y += timer-uclass.o obj-$(CONFIG_AG101P_TIMER) += ag101p_timer.o obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o -obj-$(CONFIG_ANDES_PLMT) += andes_plmt_timer.o +obj-$(CONFIG_ANDES_PLMT_TIMER) += andes_plmt_timer.o obj-$(CONFIG_ARC_TIMER) += arc_timer.o obj-$(CONFIG_AST_TIMER) += ast_timer.o obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o