
On Sun, 2019-01-06 at 22:00 +0100, Stefan Agner wrote:
From: Stefan Agner stefan.agner@toradex.com
Add usdhci peripherals to device tree. This allows to use DM_MMC for Colibri iMX7 devices.
Signed-off-by: Stefan Agner stefan.agner@toradex.com
arch/arm/dts/imx7-colibri-emmc.dts | 69 +++++++++++++++++++++++++++ arch/arm/dts/imx7-colibri-rawnand.dts | 4 ++ arch/arm/dts/imx7-colibri.dtsi | 28 +++++++++++ 3 files changed, 101 insertions(+)
diff --git a/arch/arm/dts/imx7-colibri-emmc.dts b/arch/arm/dts/imx7- colibri-emmc.dts index 295ca05916..8cf8befc7f 100644 --- a/arch/arm/dts/imx7-colibri-emmc.dts +++ b/arch/arm/dts/imx7-colibri-emmc.dts @@ -10,7 +10,76 @@ model = "Toradex Colibri iMX7D 1GB (eMMC)"; compatible = "toradex,imx7d-colibri-emmc", "fsl,imx7d";
- aliases {
mmc0 = &usdhc3;
mmc1 = &usdhc1;
- };
- chosen { stdout-path = &uart1; };
};
+&usdhc3 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc3>;
- pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
Excited, you may have gotten those higher speeds to work as well which I failed to but nay also only DDR52 so we could just leave those later two away.
- assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
- assigned-clock-rates = <400000000>;
Plus above two.
- bus-width = <8>;
- fsl,tuning-step = <2>;
Plus above.
- non-removable;
- sdhci-caps-mask = <0x80000000 0x0>;
And above.
- status = "okay";
+};
+&iomuxc {
- pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x59
MX7D_PAD_SD3_CLK__SD3_CLK 0x19
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
>;
- };
- pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
>;
- };
- pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
>;
- };
Plus of course the later two pinctrl groups.
+}; diff --git a/arch/arm/dts/imx7-colibri-rawnand.dts b/arch/arm/dts/imx7-colibri-rawnand.dts index 4eb86fb011..5d64e5ef41 100644 --- a/arch/arm/dts/imx7-colibri-rawnand.dts +++ b/arch/arm/dts/imx7-colibri-rawnand.dts @@ -10,6 +10,10 @@ model = "Toradex Colibri iMX7S/D"; compatible = "toradex,imx7-colibri", "fsl,imx7";
- aliases {
mmc0 = &usdhc1;
I believe if we only have one it does not matter.
- };
- chosen { stdout-path = &uart1; };
diff --git a/arch/arm/dts/imx7-colibri.dtsi b/arch/arm/dts/imx7- colibri.dtsi index 47295117aa..3a627fc941 100644 --- a/arch/arm/dts/imx7-colibri.dtsi +++ b/arch/arm/dts/imx7-colibri.dtsi @@ -38,6 +38,17 @@ status = "okay"; };
+&usdhc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
- no-1-8-v;
- cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
- disable-wp;
- fsl,tuning-start-tap = <20>;
- fsl,tuning-step= <2>;
Above two also don't do anything currently.
- status = "okay";
+};
&iomuxc { pinctrl_i2c4: i2c4-grp { fsl,pins = < @@ -68,6 +79,17 @@ MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* DTR */ >; };
- pinctrl_usdhc1: usdhc1-grp {
fsl,pins = <
MX7D_PAD_SD1_CMD__SD1_CMD 0x59
MX7D_PAD_SD1_CLK__SD1_CLK 0x19
MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
>;
- };
};
&iomuxc_lpsr { @@ -84,4 +106,10 @@ MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x400 0007f >; };
- pinctrl_cd_usdhc1: usdhc1-cd-grp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59
/* CD */
>;
- };
};