On 30 March 2012 10:23, Donghwa Lee dh09.lee@samsung.com wrote:
Hi, On 29 March 2012 23:37, Minkyu Kang wrote:
Dear Donghwa,
On 29 March 2012 17:50, Donghwa Lee dh09.lee@samsung.com wrote:
This is definition of system registers for EXYNOS SoC.
Signed-off-by: Donghwa Lee dh09.lee@samsung.com Signed-off-by: Kyungmin Park kyungmin.park@samsung.com
arch/arm/include/asm/arch-exynos/cpu.h | 2 + arch/arm/include/asm/arch-exynos/system.h | 51 +++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+), 0 deletions(-) create mode 100644 arch/arm/include/asm/arch-exynos/system.h
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index 89f2c2e..70048f0 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -29,6 +29,7 @@ /* EXYNOS4 */ #define EXYNOS4_GPIO_PART3_BASE 0x03860000 #define EXYNOS4_PRO_ID 0x10000000 +#define EXYNOS4_SYSREG_BASE 0x10010000 #define EXYNOS4_POWER_BASE 0x10020000 #define EXYNOS4_SWRESET 0x10020400 #define EXYNOS4_CLOCK_BASE 0x10030000
need base address of exynos5 also.
SYSREG_BASE address of exynos5 was already included in this file.
OK.
Where is it use? Need codes for using it.
This is used to control various signal of exynos. For example, it can contorl to FIMD of LBLK0 bypass selection.
If so, please post it together. This patch shouldn't be applied alone.
Minkyu Kang.