Dear Peter Tyser,
In message 1252078092.6005.63.camel@localhost.localdomain you wrote:
Wrong Question. I don't know enough about the I2C protocol. Why is i2c_wait4bus necessary?
Ok, why is it necessary?
Freescale's I2C core supports multiple masters. I'd guess that i2c_wait4bus() is used to ensure the bus is not in use by a different master before initiating a read or write. Its polling the MBB status bit, which is automatically set/cleared when the controller sees a START/STOP which supports this.
If this is the case, the timeout should be the maximum (or reasonable maximum) time an I2C transaction could take.
Thanks for the explanation - are there actually any boards out there using more than a single I2C master (i. e. the CPU) on the same I2C bus?
Best regards,
Wolfgang Denk