From: Peter Hoyes Peter.Hoyes@arm.com
Add support for the Armv8r64 architecture and the BASER_FVP, which uses the Armv8r64 architecture.
The Armv8r64 architecture has the following features: * No non-secure exception levels * Highest exception level is always S-EL2 * There is only a PMSA at S-EL2, which requires new MPU initialization logic * The VMSA at S-EL1 may not be enabled by default * We boot Linux at S-EL1, so a mechanism is required to boot other systems (e.g. Xen) at S-EL2
The BASER_FVP board config is implemented on top of the BASE_FVP and Juno "VExpress" board configs.
The Armv8-R64 architecture reference manual supplement can be found at https://developer.arm.com/documentation/ddi0600/latest/
Peter Hoyes (6): armv8: Disable pointer authentication traps for EL1 armv8: Ensure EL1&0 VMSA is enabled armv8: Add ARMv8 MPU configuration logic vexpress64: Add BASER_FVP vexpress board variant arm: Use armv8_switch_to_el1 env to switch to EL1 doc: Add documentation for the Arm vexpress board configs
arch/arm/Kconfig | 7 ++ arch/arm/cpu/armv8/cache_v8.c | 96 ++++++++++++++++++- arch/arm/cpu/armv8/fsl-layerscape/spintable.S | 2 +- arch/arm/cpu/armv8/transition.S | 2 +- arch/arm/include/asm/armv8/mpu.h | 61 ++++++++++++ arch/arm/include/asm/macro.h | 28 +++++- arch/arm/include/asm/system.h | 39 ++++++++ arch/arm/lib/bootm.c | 40 +++++--- board/armltd/vexpress64/Kconfig | 5 +- board/armltd/vexpress64/vexpress64.c | 22 +++++ configs/vexpress_aemv8r_defconfig | 18 ++++ doc/README.semihosting | 2 +- doc/arch/arm64.rst | 3 +- doc/board/armltd/index.rst | 9 ++ doc/board/armltd/vexpress64.rst | 57 +++++++++++ doc/board/index.rst | 1 + .../{vexpress_aemv8a.h => vexpress_aemv8.h} | 63 ++++++++---- 17 files changed, 408 insertions(+), 47 deletions(-) create mode 100644 arch/arm/include/asm/armv8/mpu.h create mode 100644 configs/vexpress_aemv8r_defconfig create mode 100644 doc/board/armltd/index.rst create mode 100644 doc/board/armltd/vexpress64.rst rename include/configs/{vexpress_aemv8a.h => vexpress_aemv8.h} (83%)