Hi Bin,
On 21 December 2015 at 02:16, Bin Meng bmeng.cn@gmail.com wrote:
Hi Simon,
On Sun, Dec 20, 2015 at 6:42 AM, Simon Glass sjg@chromium.org wrote:
At some point we may need to distinguish between different types of PCHs, but for existing supported platforms we only need to worry about version 7 and version 9 bridges. Add a driver for the PCH9.
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v3: None Changes in v2:
- Rename the PCH functions
- Update the get_version() handle to use an enum
drivers/pch/Makefile | 1 + drivers/pch/pch9.c | 43 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 44 insertions(+) create mode 100644 drivers/pch/pch9.c
diff --git a/drivers/pch/Makefile b/drivers/pch/Makefile index 33aa727..dde9e86 100644 --- a/drivers/pch/Makefile +++ b/drivers/pch/Makefile @@ -4,3 +4,4 @@
obj-y += pch-uclass.o obj-y += pch7.o +obj-y += pch9.o diff --git a/drivers/pch/pch9.c b/drivers/pch/pch9.c new file mode 100644 index 0000000..529cb02 --- /dev/null +++ b/drivers/pch/pch9.c @@ -0,0 +1,43 @@ +/*
- Copyright (C) 2014 Google, Inc
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <dm.h> +#include <pch.h>
+#define SBASE_ADDR 0x54
+static int pch9_get_sbase(struct udevice *dev, ulong *sbasep) +{
uint32_t sbase_addr;dm_pci_read_config32(dev, SBASE_ADDR, &sbase_addr);*sbasep = sbase_addr & 0xfffffe00;return 0;+}
+static enum pch_version pch9_get_version(struct udevice *dev) +{
return PCHV_9;+}
+static const struct pch_ops pch9_ops = {
.get_sbase = pch9_get_sbase,.get_version = pch9_get_version,No set_spi_protect() op implementation?
From my testing minnowmax works fine without this.
+};
+static const struct udevice_id pch9_ids[] = {
{ .compatible = "intel,pch9" },{ }+};
+U_BOOT_DRIVER(pch9_drv) = {
.name = "intel-pch9",.id = UCLASS_PCH,.of_match = pch9_ids,.ops = &pch9_ops,+};
Regards, Simon