On 08/17/2015 02:42 AM, Yuantian.Tang@freescale.com wrote:
From: Tang Yuantian Yuantian.Tang@freescale.com
Freescale ARM-based Layerscape LS2085A contain a SATA controller which comply with the serial ATA 3.0 specification and the AHCI 1.3 specification. This patch adds SATA feature on ls2085aqds and ls2085ardb boards.
Signed-off-by: Tang Yuantian Yuantian.Tang@freescale.com
v2:
- rebase to the latest git tree
arch/arm/cpu/armv8/fsl-lsch3/soc.c | 41 +++++++++++++++++++++++ arch/arm/include/asm/arch-fsl-lsch3/config.h | 20 +++++++++++ arch/arm/include/asm/arch-fsl-lsch3/immap_lsch3.h | 25 ++++++++++++++ arch/arm/include/asm/arch-fsl-lsch3/soc.h | 2 +- board/freescale/ls2085aqds/ls2085aqds.c | 11 ++++++ board/freescale/ls2085ardb/ls2085ardb.c | 11 ++++++ 6 files changed, 109 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/soc.c b/arch/arm/cpu/armv8/fsl-lsch3/soc.c index 2538001..0e6f07b 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/soc.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/soc.c @@ -11,6 +11,9 @@ #include <asm/arch-fsl-lsch3/soc.h> #include <asm/io.h> #include <asm/global_data.h> +#include <asm/arch-fsl-lsch3/immap_lsch3.h> +#include <ahci.h> +#include <scsi.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -70,12 +73,50 @@ static void erratum_a009203(void) #endif }
+void ls2085a_sata_init(void) +{
- struct ccsr_ahci __iomem *ahci_base;
- ahci_base = (void __iomem *)CONFIG_SYS_SATA2;
- out_le32(&ahci_base->ppcfg, 0xa003fffe);
Please put a comment to explain what this does and avoid using magic numbers.
- ahci_base = (void __iomem *)CONFIG_SYS_SATA1;
- out_le32(&ahci_base->ppcfg, 0xa003fffe);
Same here.
York