On 13.04.2012 20:19, Scott Wood wrote:
On 04/13/2012 06:20 AM, Timo Ketola wrote:
First two bytes of the first OOB of erase block are reserved for factory bad block marking, usually.
Signed-off-by: Timo Ketolatimo@exertus.fi
drivers/mtd/nand/mxc_nand.c | 35 +++++++++++++++++++++++++++++++++++ 1 files changed, 35 insertions(+), 0 deletions(-)
So what happened before? The default is at offset 8, which doesn't conflict with the bad block marker. It seems the actual issue is a conflict with ECC?
You seem to be right. I think I was badly confused with the kernel behaviour.
And NAND_USE_FLASH_BBT wasn't defined before, so a better subject line for this patch would be "nand/mxc: support flash-based BBT".
Most probably right too.
Won't veroffs = 6 conflict with ECC in the MXC_NFC_V1 case?
Seems to.
What about 8-bit small page support, in which case the bad block marker is at offset 5?
What about putting into the block
#if defined(MXC_NFC_V1) #ifndef CONFIG_SYS_NAND_LARGEPAGE
defines for pattern and version offsets and use them in bbt_*_descr initializations? Or should they be in board configuration file?
+#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
- this->options = NAND_USE_FLASH_BBT;
- this->bbt_td =&bbt_main_descr;
- this->bbt_md =&bbt_mirror_descr;
+#endif
Please remove those blank lines inside the ifdef.
Ok
--
Timo