Hi Josh, Miss maintainer part.
On 03/15/2013 06:17 PM, Josh Wu wrote:
This patch adds at91sam9n12ek support, it enables:
- dbgu
- nand with pmecc
- spi flash
- mmc
- lcd
TODO:
- usb
- ethernet
Signed-off-by: Josh Wujosh.wu@atmel.com
arch/arm/cpu/arm926ejs/at91/Makefile | 1 + arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c | 137 ++++++++++ arch/arm/cpu/arm926ejs/at91/clock.c | 4 +- arch/arm/include/asm/arch-at91/at91sam9_matrix.h | 2 + arch/arm/include/asm/arch-at91/at91sam9n12.h | 126 +++++++++ arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h | 17 +- arch/arm/include/asm/arch-at91/hardware.h | 2 + board/atmel/at91sam9n12ek/Makefile | 52 ++++ board/atmel/at91sam9n12ek/at91sam9n12ek.c | 270 ++++++++++++++++++++ boards.cfg | 3 + drivers/spi/atmel_spi.c | 3 +- include/configs/at91sam9n12ek.h | 232 +++++++++++++++++ 12 files changed, 843 insertions(+), 6 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c create mode 100644 arch/arm/include/asm/arch-at91/at91sam9n12.h create mode 100644 board/atmel/at91sam9n12ek/Makefile create mode 100644 board/atmel/at91sam9n12ek/at91sam9n12ek.c create mode 100644 include/configs/at91sam9n12ek.h
diff --git a/arch/arm/cpu/arm926ejs/at91/Makefile b/arch/arm/cpu/arm926ejs/at91/Makefile index 346e58f..c4964a1 100644 --- a/arch/arm/cpu/arm926ejs/at91/Makefile +++ b/arch/arm/cpu/arm926ejs/at91/Makefile @@ -36,6 +36,7 @@ COBJS-$(CONFIG_AT91SAM9RL) += at91sam9rl_devices.o COBJS-$(CONFIG_AT91SAM9M10G45) += at91sam9m10g45_devices.o COBJS-$(CONFIG_AT91SAM9G45) += at91sam9m10g45_devices.o COBJS-$(CONFIG_AT91SAM9X5) += at91sam9x5_devices.o +COBJS-$(CONFIG_AT91SAM9N12) += at91sam9n12_devices.o
We should keep alpha order.
COBJS-$(CONFIG_AT91_EFLASH) += eflash.o COBJS-$(CONFIG_AT91_LED) += led.o COBJS-y += clock.o diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c new file mode 100644 index 0000000..5094262 --- /dev/null +++ b/arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c @@ -0,0 +1,137 @@ +/*
- (C) Copyright 2013 Atmel Corporation
- Josh Wujosh.wu@atmel.com
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include<common.h> +#include<asm/io.h> +#include<asm/arch/at91_common.h> +#include<asm/arch/at91_pmc.h> +#include<asm/arch/at91_pio.h>
+unsigned int has_lcdc() +{
- return 1;
+}
+void at91_serial0_hw_init(void) +{
- at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
- at91_set_a_periph(AT91_PIO_PORTA, 0, 1); /* TXD0 */
- at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* RXD0 */
- writel(1<< ATMEL_ID_USART0,&pmc->pcer);
+}
+void at91_serial1_hw_init(void) +{
- at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
- at91_set_a_periph(AT91_PIO_PORTA, 5, 1); /* TXD1 */
- at91_set_a_periph(AT91_PIO_PORTA, 6, 0); /* RXD1 */
- writel(1<< ATMEL_ID_USART1,&pmc->pcer);
+}
+void at91_serial2_hw_init(void) +{
- at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
- at91_set_a_periph(AT91_PIO_PORTA, 7, 1); /* TXD2 */
- at91_set_a_periph(AT91_PIO_PORTA, 8, 0); /* RXD2 */
- writel(1<< ATMEL_ID_USART2,&pmc->pcer);
+}
+void at91_serial3_hw_init(void) +{
- at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
- at91_set_b_periph(AT91_PIO_PORTC, 22, 1); /* TXD3 */
- at91_set_b_periph(AT91_PIO_PORTC, 23, 0); /* RXD3 */
- writel(1<< ATMEL_ID_USART3,&pmc->pcer);
+}
+void at91_seriald_hw_init(void) +{
- at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
- at91_set_a_periph(AT91_PIO_PORTA, 9, 1); /* DRXD */
- at91_set_a_periph(AT91_PIO_PORTA, 10, 0); /* DTXD */
- writel(1<< ATMEL_ID_SYS,&pmc->pcer);
+}
+#ifdef CONFIG_ATMEL_SPI +void at91_spi0_hw_init(unsigned long cs_mask) +{
- at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
- at91_set_a_periph(AT91_PIO_PORTA, 11, 1); /* SPI0_MISO */
- at91_set_a_periph(AT91_PIO_PORTA, 12, 1); /* SPI0_MOSI */
- at91_set_a_periph(AT91_PIO_PORTA, 13, 1); /* SPI0_SPCK */
- /* Enable clock */
- writel(1<< ATMEL_ID_SPI0,&pmc->pcer);
- if (cs_mask& (1<< 0))
at91_set_a_periph(AT91_PIO_PORTA, 14, 1);- if (cs_mask& (1<< 1))
at91_set_b_periph(AT91_PIO_PORTA, 7, 1);- if (cs_mask& (1<< 2))
at91_set_b_periph(AT91_PIO_PORTA, 1, 1);- if (cs_mask& (1<< 3))
at91_set_b_periph(AT91_PIO_PORTB, 3, 1);+}
+void at91_spi1_hw_init(unsigned long cs_mask) +{
- at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
- at91_set_b_periph(AT91_PIO_PORTA, 21, 1); /* SPI1_MISO */
- at91_set_b_periph(AT91_PIO_PORTA, 22, 1); /* SPI1_MOSI */
- at91_set_b_periph(AT91_PIO_PORTA, 23, 1); /* SPI1_SPCK */
- /* Enable clock */
- writel(1<< ATMEL_ID_SPI1,&pmc->pcer);
- if (cs_mask& (1<< 0))
at91_set_b_periph(AT91_PIO_PORTA, 8, 1);- if (cs_mask& (1<< 1))
at91_set_b_periph(AT91_PIO_PORTA, 0, 1);- if (cs_mask& (1<< 2))
at91_set_b_periph(AT91_PIO_PORTA, 31, 1);- if (cs_mask& (1<< 3))
at91_set_b_periph(AT91_PIO_PORTA, 30, 1);+} +#endif
+void at91_mci_hw_init(void) +{
- struct at91_pmc *pmc = (struct at91_pmec *)ATMEL_BASE_PMC;
- at91_set_a_periph(AT91_PIO_PORTA, 17, 0); /* MCCK */
- at91_set_a_periph(AT91_PIO_PORTA, 16, 0); /* MCCDA */
- at91_set_a_periph(AT91_PIO_PORTA, 15, 0); /* MCDA0 */
- at91_set_a_periph(AT91_PIO_PORTA, 18, 0); /* MCDA1 */
- at91_set_a_periph(AT91_PIO_PORTA, 19, 0); /* MCDA2 */
- at91_set_a_periph(AT91_PIO_PORTA, 20, 0); /* MCDA3 */
- writel(1<< ATMEL_ID_HSMCI,&pmc->pcer);
+}
diff --git a/arch/arm/cpu/arm926ejs/at91/clock.c b/arch/arm/cpu/arm926ejs/at91/clock.c index f825388..55c9eac 100644 --- a/arch/arm/cpu/arm926ejs/at91/clock.c +++ b/arch/arm/cpu/arm926ejs/at91/clock.c @@ -156,7 +156,7 @@ int at91_clock_init(unsigned long main_clock) */ mckr = readl(&pmc->mckr); #if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) \
|| defined(CONFIG_AT91SAM9X5)
|| defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)@@ -171,7 +171,7 @@ int at91_clock_init(unsigned long main_clock) if (mckr& AT91_PMC_MCKR_MDIV_MASK) freq /= 2; /* processor clock division */ #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) \
|| defined(CONFIG_AT91SAM9X5)
|| defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
- 0<==> 1
- 1<==> 2
diff --git a/arch/arm/include/asm/arch-at91/at91sam9_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9_matrix.h index b9a93b0..2cd0dfb 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9_matrix.h +++ b/arch/arm/include/asm/arch-at91/at91sam9_matrix.h @@ -25,6 +25,8 @@ #include<asm/arch/at91sam9g45_matrix.h> #elif defined(CONFIG_AT91SAM9X5) #include<asm/arch/at91sam9x5_matrix.h> +#elif defined(CONFIG_AT91SAM9N12) +#include<asm/arch/at91sam9n12_matrix.h>
I don't see there is a at91sam9n12_matrix.h file.
I think there should be --->8--- #elif defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12) #include<asm/arch/at91sam9x5_matrix.h> ---<8---
#else #error "Unsupported AT91SAM9/CAP9 processor" #endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9n12.h b/arch/arm/include/asm/arch-at91/at91sam9n12.h new file mode 100644 index 0000000..ce255b8 --- /dev/null +++ b/arch/arm/include/asm/arch-at91/at91sam9n12.h @@ -0,0 +1,126 @@ +/*
- Chip-specific header file for the AT91SAM9N12
- (C) Copyright 2013 Atmel Corporation.
- Josh Wujosh.wu@atmel.com
- Definitions for the SoC:
- AT91SAM9N12
- Note that those SoCs are mostly software and pin compatible,
- therefore this file applies to all of them. Differences between
- those SoCs are concentrated at the end of this file.
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
- */
+#ifndef __AT91SAM9N12_H +#define __AT91SAM9N12_H
+#define CONFIG_ARM926EJS /* ARM926EJS Core */ +#define CONFIG_AT91FAMILY /* It's a member of AT91 */
+/*
- Peripheral identifiers/interrupts.
- */
+#define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ +#define ATMEL_ID_SYS 1 /* System Controller Interrupt */ +#define ATMEL_ID_PIOAB 2 /* Parallel I/O Controller A and B */ +#define ATMEL_ID_PIOCD 3 /* Parallel I/O Controller C and D */ +#define ATMEL_ID_FUSE 4 /* FUSE Controller */ +#define ATMEL_ID_USART0 5 /* USART 0 */ +#define ATMEL_ID_USART1 6 /* USART 1 */ +#define ATMEL_ID_USART2 7 /* USART 2 */ +#define ATMEL_ID_USART3 8 /* USART 3 */ +#define ATMEL_ID_TWI0 9 /* Two-Wire Interface 0 */ +#define ATMEL_ID_TWI1 10 /* Two-Wire Interface 1 */ +#define ATMEL_ID_HSMCI 12 /* High Speed Multimedia Card Interface */ +#define ATMEL_ID_SPI0 13 /* Serial Peripheral Interface 0 */ +#define ATMEL_ID_SPI1 14 /* Serial Peripheral Interface 1 */ +#define ATMEL_ID_UART0 15 /* UART 0 */ +#define ATMEL_ID_UART1 16 /* UART 1 */ +#define ATMEL_ID_TC01 17 /* Timer Counter 0, 1, 2, 3, 4 and 5 */ +#define ATMEL_ID_PWM 18 /* Pulse Width Modulation Controller */ +#define ATMEL_ID_ADC 19 /* ADC Controller */ +#define ATMEL_ID_DMAC 20 /* DMA Controller */ +#define ATMEL_ID_UHP 22 /* USB Host */ +#define ATMEL_ID_UDP 23 /* USB Device */ +#define ATMEL_ID_LCDC 25 /* LCD Controller */ +#define ATMEL_ID_SSC 28 /* Synchronous Serial Controller */ +#define ATMEL_ID_TRNG 30 /* True Random Number Generator */ +#define ATMEL_ID_IRQ 31 /* Advanced Interrupt Controller */
+/*
- User Peripherals physical base addresses.
- */
+#define ATMEL_BASE_SPI0 0xf0000000 +#define ATMEL_BASE_SPI1 0xf0004000 +#define ATMEL_BASE_HSMCI 0xf0008000 +#define ATMEL_BASE_SSC 0xf0010000 +#define ATMEL_BASE_TC012 0xf8008000 +#define ATMEL_BASE_TC345 0xf800c000 +#define ATMEL_BASE_TWI0 0xf8010000 +#define ATMEL_BASE_TWI1 0xf8014000 +#define ATMEL_BASE_USART0 0xf801c000 +#define ATMEL_BASE_USART1 0xf8020000 +#define ATMEL_BASE_USART2 0xf8024000 +#define ATMEL_BASE_USART3 0xf8028000 +#define ATMEL_BASE_PWM 0xf8034000 +#define ATMEL_BASE_LCDC 0xf8038000 +#define ATMEL_BASE_UDP 0xf803c000 +#define ATMEL_BASE_UART0 0xf8040000 +#define ATMEL_BASE_UART1 0xf8044000 +#define ATMEL_BASE_TRNG 0xf8048000 +#define ATMEL_BASE_ADC 0xf804c000
+/*
- System Peripherals physical base addresses.
- */
+#define ATMEL_BASE_FUSE 0xffffdc00 +#define ATMEL_BASE_MATRIX 0xffffde00 +#define ATMEL_BASE_PMECC 0xffffe000 +#define ATMEL_BASE_PMERRLOC 0xffffe600 +#define ATMEL_BASE_DDRSDRC 0xffffe800 +#define ATMEL_BASE_SMC 0xffffea00 +#define ATMEL_BASE_DMAC 0xffffec00 +#define ATMEL_BASE_AIC 0xfffff000 +#define ATMEL_BASE_DBGU 0xfffff200 +#define ATMEL_BASE_PIOA 0xfffff400 +#define ATMEL_BASE_PIOB 0xfffff600 +#define ATMEL_BASE_PIOC 0xfffff800 +#define ATMEL_BASE_PIOD 0xfffffa00 +#define ATMEL_BASE_PMC 0xfffffc00 +#define ATMEL_BASE_RSTC 0xfffffe00 +#define ATMEL_BASE_SHDC 0xfffffe10 +#define ATMEL_BASE_PIT 0xfffffe30 +#define ATMEL_BASE_WDT 0xfffffe40 +#define ATMEL_BASE_SCKCR 0xfffffe50 +#define ATMEL_BASE_BSCR 0xfffffe54 +#define ATMEL_BASE_GPBR 0xfffffe60 +#define ATMEL_BASE_RTC 0xfffffeb0
+/*
- Internal Memory
- */
+#define ATMEL_BASE_BOOT 0x00000000 /* Boot mapped area */ +#define ATMEL_BASE_ROM 0x00100000 /* Internal ROM base address */ +#define ATMEL_BASE_SRAM 0x00300000 /* Internal SRAM */ +#define ATMEL_UHP_BASE 0x00500000 /* USB Host controller */
I think here use ATMEL_BASE_OHCI will more clear.
+/*
- Cpu Name
- */
+#define ATMEL_CPU_NAME "AT91SAM9N12"
+/*
- Other misc defines
- */
+#define ATMEL_PIO_PORTS 4 +#define CPU_HAS_PIO3 +#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP +#define PIO_SCDR_DIV (0x3fff<< 0) /* Slow Clock Divider Mask */
+#endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h index d6ce6fa..f78e60c 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h +++ b/arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h @@ -1,10 +1,10 @@ /*
- Matrix-centric header file for the AT91SAM9X5 family
- Copyright (C) 2012 Atmel Corporation.
- Copyright (C) 2013 Atmel Corporation.
- Memory Controllers (MATRIX, EBI) - System peripherals registers.
- Based on AT91SAM9X5 preliminary datasheet.
- Based on AT91SAM9X5& AT91SAM9N12 preliminary datasheet.
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
@@ -17,14 +17,25 @@
#ifndef __ASSEMBLY__
+/* AT91SAM9N12 Matrix definition is a subset of AT91SAM9X5. */ struct at91_matrix { u32 mcfg[16]; u32 scfg[16]; u32 pras[16][2]; u32 mrcr; /* 0x100 Master Remap Control */
- u32 filler[7];
- u32 filler[5];
+#ifdef CONFIG_AT91SAM9X5
- u32 filler1[2];
+#endif
- /* EBI Chip Select Assignment Register
* 0x118: AT91SAM9N12* 0x120: AT91SAM9X5*/+#ifdef CONFIG_AT91SAM9N12
- u32 filler5[2];
+#endif u32 wpmr; u32 wpsr; }; diff --git a/arch/arm/include/asm/arch-at91/hardware.h b/arch/arm/include/asm/arch-at91/hardware.h index 4c4ee70..7ada301 100644 --- a/arch/arm/include/asm/arch-at91/hardware.h +++ b/arch/arm/include/asm/arch-at91/hardware.h @@ -39,6 +39,8 @@ # include<asm/arch/at91sam9g45.h> #elif defined(CONFIG_AT91SAM9X5) # include<asm/arch/at91sam9x5.h> +#elif defined(CONFIG_AT91SAM9N12) +# include<asm/arch/at91sam9n12.h> #elif defined(CONFIG_AT91CAP9) # include<asm/arch/at91cap9.h> #elif defined(CONFIG_AT91X40) diff --git a/board/atmel/at91sam9n12ek/Makefile b/board/atmel/at91sam9n12ek/Makefile new file mode 100644 index 0000000..9187715 --- /dev/null +++ b/board/atmel/at91sam9n12ek/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2008 +# Stelian Popstelian.pop@leadtechdesign.com +# Lead Tech Design<www.leadtechdesign.com> +# +# (C) Copyright 2013 +# Josh Wuvoice.shen@atmel.com +# Atmel corporation<www.atmel.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +#
+include $(TOPDIR)/config.mk
+LIB = $(obj)lib$(BOARD).o
+COBJS-y += at91sam9n12ek.o
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS))
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+#########################################################################
+# defines $(obj).depend target +include $(SRCTREE)/rules.mk
+sinclude $(obj).depend
+######################################################################### diff --git a/board/atmel/at91sam9n12ek/at91sam9n12ek.c b/board/atmel/at91sam9n12ek/at91sam9n12ek.c new file mode 100644 index 0000000..dc95777 --- /dev/null +++ b/board/atmel/at91sam9n12ek/at91sam9n12ek.c @@ -0,0 +1,270 @@ +/*
- (C) Copyright 2013 Atmel Corporation
- Josh Wujosh.wu@atmel.com
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include<common.h> +#include<asm/io.h> +#include<asm/arch/at91sam9x5_matrix.h> +#include<asm/arch/at91sam9_smc.h> +#include<asm/arch/at91_common.h> +#include<asm/arch/at91_pmc.h> +#include<asm/arch/at91_rstc.h> +#include<asm/arch/at91_pio.h> +#include<asm/arch/clk.h> +#include<lcd.h> +#include<atmel_hlcdc.h> +#include<atmel_mci.h>
+#ifdef CONFIG_LCD_INFO +#include<nand.h> +#include<version.h> +#endif
+DECLARE_GLOBAL_DATA_PTR;
+/* ------------------------------------------------------------------------- */ +/*
- Miscelaneous platform dependent initialisations
- */
+#ifdef CONFIG_NAND_ATMEL +static void at91sam9n12ek_nand_hw_init(void) +{
- struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
- struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- unsigned long csa;
- /* Assign CS3 to NAND/SmartMedia Interface */
- csa = readl(&matrix->ebicsa);
- csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
- /* Configure databus */
- csa&= ~AT91_MATRIX_NFD0_ON_D16; /* nandflash connect to D0~D15 */
- /* Configure IO drive */
- csa&= ~AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
- writel(csa,&matrix->ebicsa);
- /* Configure SMC CS3 for NAND/SmartMedia */
- writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),&smc->cs[3].setup);- writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(5) |
AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(6),&smc->cs[3].pulse);- writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(7),
&smc->cs[3].cycle);- writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
AT91_SMC_MODE_EXNW_DISABLE |+#ifdef CONFIG_SYS_NAND_DBW_16
AT91_SMC_MODE_DBW_16 |+#else /* CONFIG_SYS_NAND_DBW_8 */
AT91_SMC_MODE_DBW_8 |+#endif
AT91_SMC_MODE_TDF_CYCLE(1),&smc->cs[3].mode);- writel(1<< ATMEL_ID_PIOCD,&pmc->pcer);
As we enable this in board_early_init_f, so can we remove this. or keep this, remove from board_early_init_f.
- /* Configure RDY/BSY pin */
- at91_set_pio_input(AT91_PIO_PORTD, 5, 1);
- /* Configure ENABLE pin for NandFlash */
- at91_set_pio_output(AT91_PIO_PORTD, 4, 1);
- at91_set_a_periph(AT91_PIO_PORTD, 0, 1); /* NAND OE */
- at91_set_a_periph(AT91_PIO_PORTD, 1, 1); /* NAND WE */
- at91_set_a_periph(AT91_PIO_PORTD, 2, 1); /* ALE */
- at91_set_a_periph(AT91_PIO_PORTD, 3, 1); /* CLE */
+} +#endif
+#ifdef CONFIG_LCD +vidinfo_t panel_info = {
- .vl_col = 480,
- .vl_row = 272,
- .vl_clk = 9000000,
- .vl_bpix = LCD_BPP,
- .vl_sync = 0,
- .vl_tft = 1,
- .vl_hsync_len = 5,
- .vl_left_margin = 8,
- .vl_right_margin = 43,
- .vl_vsync_len = 10,
- .vl_upper_margin = 4,
- .vl_lower_margin = 12,
- .mmio = ATMEL_BASE_LCDC,
+};
+void lcd_enable(void) +{
- at91_set_pio_output(AT91_PIO_PORTC, 25, 0); /* power up */
+}
+void lcd_disable(void) +{
- at91_set_pio_output(AT91_PIO_PORTC, 25, 1); /* power down */
+}
+static void at91sam9n12ek_lcd_hw_init(void) +{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- at91_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDDPWR */
- at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDVSYNC */
- at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDHSYNC */
- at91_set_a_periph(AT91_PIO_PORTC, 28, 0); /* LCDDOTCK */
- at91_set_a_periph(AT91_PIO_PORTC, 29, 0); /* LCDDEN */
- at91_set_a_periph(AT91_PIO_PORTC, 30, 0); /* LCDDOTCK */
- at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* LCDD0 */
- at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDD1 */
- at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDD2 */
- at91_set_a_periph(AT91_PIO_PORTC, 3, 0); /* LCDD3 */
- at91_set_a_periph(AT91_PIO_PORTC, 4, 0); /* LCDD4 */
- at91_set_a_periph(AT91_PIO_PORTC, 5, 0); /* LCDD5 */
- at91_set_a_periph(AT91_PIO_PORTC, 6, 0); /* LCDD6 */
- at91_set_a_periph(AT91_PIO_PORTC, 7, 0); /* LCDD7 */
- at91_set_a_periph(AT91_PIO_PORTC, 8, 0); /* LCDD8 */
- at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* LCDD9 */
- at91_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDD10 */
- at91_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDD11 */
- at91_set_a_periph(AT91_PIO_PORTC, 12, 0); /* LCDD12 */
- at91_set_b_periph(AT91_PIO_PORTC, 13, 0); /* LCDD13 */
- at91_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDD14 */
- at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDD15 */
- at91_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDD16 */
- at91_set_a_periph(AT91_PIO_PORTC, 17, 0); /* LCDD17 */
- at91_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDD18 */
- at91_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDD19 */
- at91_set_a_periph(AT91_PIO_PORTC, 20, 0); /* LCDD20 */
- at91_set_b_periph(AT91_PIO_PORTC, 21, 0); /* LCDD21 */
- at91_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDD22 */
- at91_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDD23 */
- writel(1<< ATMEL_ID_LCDC,&pmc->pcer);
+}
+#ifdef CONFIG_LCD_INFO +void lcd_show_board_info(void) +{
- ulong dram_size, nand_size;
- int i;
- char temp[32];
- lcd_printf("%s\n", U_BOOT_VERSION);
- lcd_printf("(C) 2013 ATMEL Corp\n");
- lcd_printf("at91@atmel.com\n");
- lcd_printf("%s CPU at %s MHz\n",
ATMEL_CPU_NAME,strmhz(temp, get_cpu_clk_rate()));- dram_size = 0;
- for (i = 0; i< CONFIG_NR_DRAM_BANKS; i++)
dram_size += gd->bd->bi_dram[i].size;- nand_size = 0;
- for (i = 0; i< CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += nand_info[i].size;- lcd_printf(" %ld MB SDRAM, %ld MB NAND\n",
dram_size>> 20,nand_size>> 20);+} +#endif /* CONFIG_LCD_INFO */ +#endif /* CONFIG_LCD */
+/* SPI chip select control */ +#ifdef CONFIG_ATMEL_SPI +#include<spi.h> +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{
- return bus == 0&& cs< 2;
+}
+void spi_cs_activate(struct spi_slave *slave) +{
- switch (slave->cs) {
- case 0:
at91_set_pio_output(AT91_PIO_PORTA, 14, 0);break;- case 1:
at91_set_pio_output(AT91_PIO_PORTA, 7, 0);break;- }
+}
+void spi_cs_deactivate(struct spi_slave *slave) +{
- switch (slave->cs) {
- case 0:
at91_set_pio_output(AT91_PIO_PORTA, 14, 1);break;- case 1:
at91_set_pio_output(AT91_PIO_PORTA, 7, 1);break;- }
+} +#endif /* CONFIG_ATMEL_SPI */
+#ifdef CONFIG_GENERIC_ATMEL_MCI +int board_mmc_init(bd_t *bd) +{
- at91_mci_hw_init();
- return atmel_mci_init((void *)ATMEL_BASE_HSMCI);
+} +#endif
+int board_early_init_f(void) +{
- /* Enable clocks for all PIOs */
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- writel((1<< ATMEL_ID_PIOAB) | (1<< ATMEL_ID_PIOCD),&pmc->pcer);
Remove this or keep this remove other place.
- at91_seriald_hw_init();
- return 0;
+}
+int board_init(void) +{
- /* adress of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+#ifdef CONFIG_NAND_ATMEL
- at91sam9n12ek_nand_hw_init();
+#endif
+#ifdef CONFIG_ATMEL_SPI
- at91_spi0_hw_init(1<< 0);
+#endif
+#ifdef CONFIG_LCD
- at91sam9n12ek_lcd_hw_init();
+#endif
- return 0;
+}
+int dram_init(void) +{
- gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
CONFIG_SYS_SDRAM_SIZE);- return 0;
+} diff --git a/boards.cfg b/boards.cfg index 32b0ccf..7d87df1 100644 --- a/boards.cfg +++ b/boards.cfg @@ -106,6 +106,9 @@ at91sam9x5ek_mmc arm arm926ejs at91sam9x5ek atmel at91sam9xeek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0 at91sam9xeek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1 at91sam9xeek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH +at91sam9n12ek_nandflash arm arm926ejs at91sam9n12ek atmel at91 at91sam9n12ek:AT91SAM9N12,SYS_USE_NANDFLASH +at91sam9n12ek_spiflash arm arm926ejs at91sam9n12ek atmel at91 at91sam9n12ek:AT91SAM9N12,SYS_USE_SPIFLASH +at91sam9n12ek_mmc arm arm926ejs at91sam9n12ek atmel at91 at91sam9n12ek:AT91SAM9N12,SYS_USE_MMC snapper9260 arm arm926ejs - bluewater at91 snapper9260:AT91SAM9260 snapper9g20 arm arm926ejs snapper9260 bluewater at91 snapper9260:AT91SAM9G20 vl_ma2sc arm arm926ejs vl_ma2sc BuS at91 diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c index ce7d460..95b131a 100644 --- a/drivers/spi/atmel_spi.c +++ b/drivers/spi/atmel_spi.c @@ -92,7 +92,8 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, as->slave.cs = cs; as->regs = regs; as->mr = ATMEL_SPI_MR_MSTR | ATMEL_SPI_MR_MODFDIS -#if defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9M10G45) +#if defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9M10G45) \
- || defined(CONFIG_AT91SAM9N12) | ATMEL_SPI_MR_WDRBT #endif | ATMEL_SPI_MR_PCS(~(1<< cs)& 0xf);
diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h new file mode 100644 index 0000000..10530f4 --- /dev/null +++ b/include/configs/at91sam9n12ek.h @@ -0,0 +1,232 @@ +/*
- (C) Copyright 2013 Atmel Corporation.
- Josh Wujosh.wu@atmel.com
- Configuation settings for the AT91SAM9N12-EK boards.
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#ifndef __AT91SAM9N12_CONFIG_H_ +#define __AT91SAM9N12_CONFIG_H_
+/*
- SoC must be defined first, before hardware.h is included.
- In this case SoC is defined in boards.cfg.
- */
+#include<asm/hardware.h>
+#define CONFIG_SYS_TEXT_BASE 0x26f00000
+/* ARM asynchronous clock */ +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ +#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */ +#define CONFIG_SYS_HZ 1000
+/* Misc CPU related */ +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_OF_LIBFDT
+/* general purpose I/O */ +#define CONFIG_AT91_GPIO
+/* serial console */ +#define CONFIG_ATMEL_USART +#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CONFIG_USART_ID ATMEL_ID_SYS +#define CONFIG_BAUDRATE 115200
+/* LCD */ +#define CONFIG_LCD +#define LCD_BPP LCD_COLOR16 +#define LCD_OUTPUT_BPP 24 +#define CONFIG_LCD_LOGO +#undef LCD_TEST_PATTERN +#define CONFIG_LCD_INFO +#define CONFIG_LCD_INFO_BELOW_LOGO +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_ATMEL_HLCD +#define CONFIG_ATMEL_LCD_RGB565 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_BOOTDELAY 3
+/*
- BOOTP options
- */
+#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME
+/* NOR flash - no real flash on this board */ +#define CONFIG_SYS_NO_FLASH
+/*
- Command line configuration.
- */
+#include<config_cmd_default.h> +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_LOADS
+#define CONFIG_CMD_BOOTZ +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_NAND +#define CONFIG_CMD_SF +#define CONFIG_CMD_MMC +#define CONFIG_CMD_FAT
+#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_SDRAM_SIZE 0x08000000
+/*
- Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
- leaving the correct space for initial global data structure above
- that address while providing maximum stack area below.
- */
+# define CONFIG_SYS_INIT_SP_ADDR \
- (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
+/* DataFlash */ +#ifdef CONFIG_CMD_SF +#define CONFIG_ATMEL_SPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_ATMEL +#define CONFIG_SF_DEFAULT_SPEED 30000000 +#define CONFIG_ENV_SPI_MODE SPI_MODE_3 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 +#endif
+/* NAND flash */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_DBW_8
No where use it.
+#define CONFIG_SYS_NAND_MASK_ALE (1<< 21) +#define CONFIG_SYS_NAND_MASK_CLE (1<< 22) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 4 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTD, 5
We will consider more better method for this #define in future.
+/* PMECC& PMERRLOC */ +#define CONFIG_ATMEL_NAND_HWECC +#define CONFIG_ATMEL_NAND_HW_PMECC +#define CONFIG_PMECC_CAP 2 +#define CONFIG_PMECC_SECTOR_SIZE 512 +#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000 +#endif
+/* MMC */ +#ifdef CONFIG_CMD_MMC +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_GENERIC_ATMEL_MCI +#endif
+/* FAT */ +#ifdef CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#endif
+#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END 0x26e00000
+#ifdef CONFIG_SYS_USE_SPIFLASH
+/* bootstrap + u-boot + env + linux in dataflash on CS0 */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET 0x5000 +#define CONFIG_ENV_SIZE 0x3000 +#define CONFIG_ENV_SECT_SIZE 0x1000 +#define CONFIG_BOOTCOMMAND \
- "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
- "bootm 0x22000000"
+#elif defined(CONFIG_SYS_USE_NANDFLASH)
+/* bootstrap + u-boot + env + linux in nandflash */ +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET 0xc0000 +#define CONFIG_ENV_OFFSET_REDUND 0x100000 +#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ +#define CONFIG_BOOTCOMMAND \
- "nand read 0x21000000 0x180000 0x080000;" \
- "nand read 0x22000000 0x200000 0x400000;" \
- "bootm 0x22000000 - 0x21000000"
+#else /* CONFIG_SYS_USE_MMC */
+/* bootstrap + u-boot + env + linux in mmc */ +#define CONFIG_ENV_IS_IN_MMC +/* For FAT system, most cases it should be in the reserved sector */ +#define CONFIG_ENV_OFFSET 0x2000 +#define CONFIG_ENV_SIZE 0x1000 +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_BOOTCOMMAND \
- "mmcinfo;fatload mmc 0:1 0x21000000 dtb;" \
- "fatload mmc 0:1 0x22000000 uImage;" \
- "bootm 0x22000000 - 0x21000000"
+#endif
+#ifdef CONFIG_SYS_USE_MMC +#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "root=/dev/mmcblk0p2 " \
- "rw rootfstype=ext4 rootwait"
+#else +#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
+#endif
+#define CONFIG_SYS_PROMPT "U-Boot> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_HUSH_PARSER
+/*
- Size of malloc() pool
- */
+#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
+#define CONFIG_STACKSIZE (32*1024) /* regular stack */
+#endif
Best Regards, Bo Shen