Hi Alper,
On Mon, 13 Dec 2021 at 15:15, Alper Nebi Yasak alpernebiyasak@gmail.com wrote:
I have recently started testing booting U-Boot from SPI on my gru-kevin (as opposed to chainloading it from vendor coreboot + depthcharge) and brought it to a better working state based on an initial support patch from Marty [1][2] and some follow-up work by Simon [3].
I tried to keep them as the git author when I took things from their work, but squashing other changes into those and rewriting commit messages makes things a bit weird in my opinion, especially for keeping their signoff. Do tell me if there is a better way to that.
As the Kevin and Bob boards are very similar, I assumed the config and devicetree changes will be appropriate for Bob as well, and applied them to it first. I do not have a Bob, so could not test on one myself, but Simon did test an earlier version of this and it appears to work [4].
Other useful things for these boards:
- Patch to fix a hang when usb controllers exit [5] (or [6])
- Series to support HS400ES mode as HS400 training fails [7]
- Hack to skip eMMC reinitialization so it keeps working [8]
[1] https://patchwork.ozlabs.org/patch/1053386/ [2] https://patchwork.ozlabs.org/comment/2488899/ [3] https://github.com/sjg20/u-boot/commits/kevin [4] https://patchwork.ozlabs.org/comment/2799106/ [5] https://patchwork.ozlabs.org/project/uboot/patch/20210406151059.1187379-1-ic... [6] https://patchwork.ozlabs.org/project/uboot/patch/20211210200124.19226-1-alpe... [7] https://patchwork.ozlabs.org/project/uboot/list/?series=269768 [8] https://patchwork.ozlabs.org/comment/2779784/
Changes in v2:
- Drop unnecessary ifdef.
- Clarify commit message regarding 'values set in coreboot'.
- Rebase on u-boot/next, fixing conflict in board_debug_uart_init()
v1: https://patchwork.ozlabs.org/project/uboot/list/?series=273848
Alper Nebi Yasak (2): rockchip: gru: Set up SoC IO domain registers rockchip: bob: Enable more configs
Marty E. Plummer (1): rockchip: rk3399: Add support for chromebook_kevin
Simon Glass (1): rockchip: gru: Add more devicetree settings
arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3399-gru-kevin-u-boot.dtsi | 11 ++ arch/arm/dts/rk3399-gru-u-boot.dtsi | 55 +++++++++ arch/arm/mach-rockchip/rk3399/Kconfig | 11 ++ arch/arm/mach-rockchip/rk3399/rk3399.c | 3 +- arch/arm/mach-rockchip/spl.c | 3 +- board/google/gru/Kconfig | 16 +++ board/google/gru/MAINTAINERS | 8 ++ board/google/gru/gru.c | 54 +++++++- configs/chromebook_bob_defconfig | 27 +++- configs/chromebook_kevin_defconfig | 116 ++++++++++++++++++ doc/board/rockchip/rockchip.rst | 1 + include/configs/gru.h | 3 + include/dt-bindings/input/linux-event-codes.h | 3 +- 14 files changed, 307 insertions(+), 5 deletions(-) create mode 100644 arch/arm/dts/rk3399-gru-kevin-u-boot.dtsi create mode 100644 configs/chromebook_kevin_defconfig
-- 2.34.1
Thanks for the info. I tested on kevin and bob again, with the eMMC series. I see an MMC problem on bob but kevin seems to be OK (intermittent?)
bob —
This is with upstream/next, showing mmc working:
HEAD is now at 0ebf465d343 Merge tag 'dm-pull-17dec21' of https://source.denx.de/u-boot/custodians/u-boot-dm into next (<detached:remotes/us/next=0ebf4) sglass@ELLESMERE ~/u> !do do-try-int.sh bob Revision 0ebf465d343868bf1080d540ab64de39bb927a09, board bob
Checking revision 0ebf465d343868bf1080d540ab64de39bb927a09 /vid/software/devel/ubtest tbot starting ... ├─Parameters: │ rev = '0ebf465d343868bf1080d540ab64de39bb927a09' │ clean = False ├─Calling uboot_build_and_flash ... │ ├─bob is on port 9904 and uses /dev/pts/30 │ ├─Calling uboot_build ... │ │ ├─Calling uboot_checkout ... │ │ │ ├─Builder: bob │ │ │ └─Done. (0.179s) │ │ ├─Configuring build ... │ │ ├─Calling uboot_make ... │ │ │ └─Done. (9.400s) │ │ └─Done. (9.883s) │ ├─Calling uboot_flash ... │ │ └─Done. (1.176s) │ └─Done. (11.512s) ├───────────────────────────────────────── └─SUCCESS (11.642s) tbot starting ... ├─Calling interactive_board ... │ ├─bob is on port 9904 and uses /dev/pts/30 │ ├─POWERON (bob) │ ├─Entering interactive shell (CTRL+D to exit) ... Channel 0: LPDDR3, 933MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB Channel 1: LPDDR3, 933MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB 256B stride
U-Boot SPL 2022.01-rc3-00001-g0ebf465d343 (Dec 19 2021 - 08:49:25 -0700) Trying to boot from SPI rockchip_rk3399_pinctrl pinctrl: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19 rockchip_rk3399_pinctrl pinctrl: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19 ns16550_serial serial@ff1a0000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
U-Boot 2022.01-rc3-00001-g0ebf465d343 (Dec 19 2021 - 08:49:25 -0700)
Model: Google Bob DRAM: 3.9 GiB Cannot find regulator pwm init_voltage MMC: mmc@fe320000: 1, mmc@fe330000: 0 Loading Environment from MMC... *** Warning - bad CRC, using default environment
Got rc -1, expected 100 Failed to probe keyboard 'keyboard-controller' In: serial@ff1a0000 Out: serial@ff1a0000 Err: serial@ff1a0000 Model: Google Bob Net: No ethernet found. Hit any key to stop autoboot: 0 => mmc info Device: mmc@fe330000 Manufacturer ID: 70 OEM: 100 Name: M5251 Bus Speed: 52000000 Mode: MMC High Speed (52MHz) Rd Block Len: 512 MMC version 5.1 High Capacity: Yes Capacity: 14.6 GiB Bus Width: 8-bit Erase Group Size: 512 KiB HC WP Group Size: 8 MiB User Capacity: 14.6 GiB WRREL Boot Capacity: 4 MiB ENH RPMB Capacity: 4 MiB ENH Boot area 0 is not write protected Boot area 1 is not write protected => │ ├─POWEROFF (bob) │ └─Done. (14.681s) ├───────────────────────────────────────── └─SUCCESS (14.788s)
Here is mmc broken:
(<detached:remotes/us/next=0ebf4 ) sglass@ELLESMERE ~/u> co try-kevin4 Previous HEAD position was 0ebf465d343 Merge tag 'dm-pull-17dec21' of https://source.denx.de/u-boot/custodians/u-boot-dm into next Switched to branch 'try-kevin4' Your branch is ahead of 'us/next' by 7 commits. (use "git push" to publish your local commits) (=144d4/) sglass@ELLESMERE ~/u> pe 144d40cc2f5 (HEAD -> try-kevin4) rockchip: rk3399: Add support for chromebook_kevin be6b5764541 rockchip: bob: Enable more configs d416afaf67b rockchip: gru: Add more devicetree settings 3618ebc04f5 rockchip: gru: Set up SoC IO domain registers 3f557b1553f rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3568 0b6160c0b12 rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3399 7c7879e38ec mmc: sdhci: Add HS400 Enhanced Strobe support 0ebf465d343 (us/next) Merge tag 'dm-pull-17dec21' of https://source.denx.de/u-boot/custodians/u-boot-dm into next 121cfe5a84d (tag: dm-pull-17dec21, dm/next, dm-public/next, dm-push) fdtgrep: Handle an empty output tree 70ab7b17991 fdtgrep: Correct alignment of struct section (=144d4) sglass@ELLESMERE ~/u> !do do-try-int.sh bob Revision 144d40cc2f5165128db0685cb85fe492f0d4005f, board bob
Checking revision 144d40cc2f5165128db0685cb85fe492f0d4005f /vid/software/devel/ubtest tbot starting ... ├─Parameters: │ rev = '144d40cc2f5165128db0685cb85fe492f0d4005f' │ clean = False ├─Calling uboot_build_and_flash ... │ ├─bob is on port 9904 and uses /dev/pts/30 │ ├─Calling uboot_build ... │ │ ├─Calling uboot_checkout ... │ │ │ ├─Builder: bob │ │ │ └─Done. (0.195s) │ │ ├─Configuring build ... │ │ ├─Calling uboot_make ... │ │ │ └─Done. (9.975s) │ │ └─Done. (10.366s) │ ├─Calling uboot_flash ... │ │ └─Done. (2.202s) │ └─Done. (13.059s) ├───────────────────────────────────────── └─SUCCESS (13.181s) tbot starting ... ├─Calling interactive_board ... │ ├─bob is on port 9904 and uses /dev/pts/30 │ ├─POWERON (bob) │ ├─Entering interactive shell (CTRL+D to exit) ... Channel 0: LPDDR3, 933MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB Channel 1: LPDDR3, 933MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB 256B stride
U-Boot SPL 2022.01-rc3-00008-g144d40cc2f5 (Dec 19 2021 - 08:49:57 -0700) Trying to boot from SPI rockchip_rk3399_pinctrl pinctrl: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19 rockchip_rk3399_pinctrl pinctrl: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19 ns16550_serial serial@ff1a0000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
U-Boot 2022.01-rc3-00008-g144d40cc2f5 (Dec 19 2021 - 08:49:57 -0700)
Model: Google Bob DRAM: 3.9 GiB MMC: mmc@fe320000: 1, mmc@fe330000: 0 Loading Environment from MMC... unable to select a mode : -70 *** Warning - No block device, using default environment
In: cros-ec-keyb Out: vidconsole Err: vidconsole Model: Google Bob Net: No ethernet found. Hit any key to stop autoboot: 0 => │ ├─POWEROFF (bob) │ └─Done. (8.684s) ├───────────────────────────────────────── └─SUCCESS (8.790s)
For kevin, things seem OK:
kevin —--
sglass@ELLESMERE ~/u> ol 144d40cc2f5 (HEAD -> try-kevin4) rockchip: rk3399: Add support for chromebook_kevin be6b5764541 rockchip: bob: Enable more configs d416afaf67b rockchip: gru: Add more devicetree settings 3618ebc04f5 rockchip: gru: Set up SoC IO domain registers 3f557b1553f rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3568 0b6160c0b12 rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3399 7c7879e38ec mmc: sdhci: Add HS400 Enhanced Strobe support (=144d4) sglass@ELLESMERE ~/u> pe 144d40cc2f5 (HEAD -> try-kevin4) rockchip: rk3399: Add support for chromebook_kevin be6b5764541 rockchip: bob: Enable more configs d416afaf67b rockchip: gru: Add more devicetree settings 3618ebc04f5 rockchip: gru: Set up SoC IO domain registers 3f557b1553f rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3568 0b6160c0b12 rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3399 7c7879e38ec mmc: sdhci: Add HS400 Enhanced Strobe support 0ebf465d343 (us/next) Merge tag 'dm-pull-17dec21' of https://source.denx.de/u-boot/custodians/u-boot-dm into next 121cfe5a84d (tag: dm-pull-17dec21, dm/next, dm-public/next, dm-push) fdtgrep: Handle an empty output tree 70ab7b17991 fdtgrep: Correct alignment of struct section (=144d4 ) sglass@ELLESMERE ~/u> !do do-try-int.sh kevin Revision 144d40cc2f5165128db0685cb85fe492f0d4005f, board kevin
Checking revision 144d40cc2f5165128db0685cb85fe492f0d4005f /vid/software/devel/ubtest tbot starting ... ├─Parameters: │ rev = '144d40cc2f5165128db0685cb85fe492f0d4005f' │ clean = False ├─Calling uboot_build_and_flash ... │ ├─kevin is on port 9907 and uses /dev/pts/12 │ ├─Calling uboot_build ... │ │ ├─Calling uboot_checkout ... │ │ │ ├─Builder: kevin │ │ │ └─Done. (0.173s) │ │ ├─Configuring build ... │ │ ├─Calling uboot_make ... │ │ │ └─Done. (1.996s) │ │ └─Done. (2.356s) │ ├─Calling uboot_flash ... │ │ └─Done. (2.457s) │ └─Done. (5.257s) ├───────────────────────────────────────── └─SUCCESS (5.498s) tbot starting ... ├─Calling interactive_board ... │ ├─kevin is on port 9907 and uses /dev/pts/12 │ ├─POWERON (kevin) │ ├─Entering interactive shell (CTRL+D to exit) ... Channel 0: LPDDR3, 933MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB Channel 1: LPDDR3, 933MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB 256B stride
U-Boot SPL 2022.01-rc3-00008-g144d40cc2f5 (Dec 19 2021 - 08:46:51 -0700) Trying to boot from SPI rockchip_rk3399_pinctrl pinctrl: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19 rockchip_rk3399_pinctrl pinctrl: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19 ns16550_serial serial@ff1a0000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
U-Boot 2022.01-rc3-00008-g144d40cc2f5 (Dec 19 2021 - 08:46:51 -0700)
Model: Google Kevin DRAM: 3.9 GiB MMC: mmc@fe320000: 1, mmc@fe330000: 0 Loading Environment from MMC... *** Warning - bad CRC, using default environment
In: cros-ec-keyb Out: vidconsole Err: vidconsole Model: Google Kevin Net: No ethernet found. Hit any key to stop autoboot: 0 => mmc info Device: mmc@fe330000 Manufacturer ID: 11 OEM: 100 Name: 50007 Bus Speed: 200000000 Mode: HS400ES (200MHz) Rd Block Len: 512 MMC version 5.0 High Capacity: Yes Capacity: 29.1 GiB Bus Width: 8-bit DDR Erase Group Size: 512 KiB HC WP Group Size: 4 MiB User Capacity: 29.1 GiB WRREL Boot Capacity: 4 MiB ENH RPMB Capacity: 4 MiB ENH Boot area 0 is not write protected Boot area 1 is not write protected
Regards, Simon