Split the existing dram_init for da8xx when ARM reloc is enabled, like the changes to arch/arm/cpu/arm926ejs/orion5x/dram.c in 0f234d263b17ccf1b8fd776eb8c15b7cdb27a887 by Heiko Schocher hs@denx.de.
Without these changes gd->ram_size is '0' which leads to incorrect relocation when CONFIG_SYS_ARM_WITHOUT_RELOC is defined and the board does not boot.
We use get_ram_size to dynamically calculate the available RAM because it runs on different board version with different ram, as suggested by Heiko in private communication.
Tested on a da850evm with 128M of DDR2 installed; with both CONFIG_SYS_ARM_WITHOUT_RELOC defined and undefined.
Signed-off-by: Ben Gardiner bengardiner@nanometrics.ca --- This patch is submitted for the arm-reloc-and-cache-support branch of git://git.denx.de/u-boot-testing.git
V2: * added Nori Sehkar to the to: list * indicated for which branch of testing this patch is submitted.
board/davinci/common/misc.c | 17 +++++++++++++++++ include/configs/da850evm.h | 1 + 2 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/board/davinci/common/misc.c b/board/davinci/common/misc.c index 25ca326..e8acefe 100644 --- a/board/davinci/common/misc.c +++ b/board/davinci/common/misc.c @@ -33,6 +33,7 @@
DECLARE_GLOBAL_DATA_PTR;
+#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) int dram_init(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; @@ -40,6 +41,22 @@ int dram_init(void)
return(0); } +#else +int dram_init(void) +{ + /* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size = get_ram_size( + (volatile void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_MAX_RAM_BANK_SIZE); + return(0); +} + +void dram_init_banksize (void) +{ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = gd->ram_size; +} +#endif
#ifdef CONFIG_DRIVER_TI_EMAC
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 016a21e..c929f6b 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -47,6 +47,7 @@ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* reserved for initial data */ #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ #define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ +#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /*DDR2 Data region maximum size from SPRS586*/
/* memtest start addr */ #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000)