On 09:43-20230503, Udit Kumar wrote:
This patch moves pin mux from r5 dts to common dts file. Along with removing duplicated defines.
Signed-off-by: Udit Kumar u-kumar1@ti.com
arch/arm/dts/k3-j7200-common-proc-board.dts | 16 ++++-- .../arm/dts/k3-j7200-r5-common-proc-board.dts | 51 +------------------ arch/arm/dts/k3-j7200-som-p0.dtsi | 3 ++ 3 files changed, 17 insertions(+), 53 deletions(-)
diff --git a/arch/arm/dts/k3-j7200-common-proc-board.dts b/arch/arm/dts/k3-j7200-common-proc-board.dts index 63633e4f6c..98d1fde4db 100644 --- a/arch/arm/dts/k3-j7200-common-proc-board.dts +++ b/arch/arm/dts/k3-j7200-common-proc-board.dts @@ -107,10 +107,15 @@ };
&main_pmx0 {
- main_i2c0_pins_default: main-i2c0-pins-default {
- bootph-pre-ram;
- main_uart0_pins_default: main_uart0_pins_default {
bootph-pre-ram;
J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */;};@@ -122,6 +127,7 @@ };
main_mmc1_pins_default: main-mmc1-pins-default {
bootph-pre-ram;@@ -142,7 +148,9 @@ };
&main_pmx1 {
- bootph-pre-ram; main_usbss0_pins_default: main-usbss0-pins-default {
bootph-pre-ram;;@@ -163,6 +171,8 @@ status = "okay"; /* Shared with ATF on this platform */ power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
- pinctrl-names = "default";
- pinctrl-0 = <&main_uart0_pins_default>;
};
&main_uart1 { diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts index 9d9ffcbb89..9b42e4d2ca 100644 --- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts @@ -5,7 +5,7 @@
/dts-v1/;
-#include "k3-j7200-som-p0.dtsi" +#include "k3-j7200-common-proc-board.dts" #include "k3-j7200-ddr-evm-lp4-2666.dtsi" #include "k3-j721e-ddr.dtsi"
@@ -152,47 +152,6 @@ }; };
-&main_pmx0 {
- bootph-pre-ram;
- main_uart0_pins_default: main_uart0_pins_default {
bootph-pre-ram;pinctrl-single,pins = <J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */>;- };
- main_i2c0_pins_default: main-i2c0-pins-default {
bootph-pre-ram;pinctrl-single,pins = <J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */>;- };
- main_mmc1_pins_default: main_mmc1_pins_default {
pinctrl-single,pins = <J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */J721E_IOPAD(0xfc, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */J721E_IOPAD(0xf8, PIN_INPUT, 0) /* (M19) MMC1_DAT0 */J721E_IOPAD(0xf4, PIN_INPUT, 0) /* (N21) MMC1_DAT1 */J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */>;- };
- main_usbss0_pins_default: main_usbss0_pins_default {
pinctrl-single,pins = <J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */>;- };
-};
&wkup_uart0 { bootph-pre-ram; pinctrl-names = "default"; @@ -210,14 +169,6 @@ clock-frequency = <96000000>; };
-&main_uart0 {
- status = "okay";
- power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
- pinctrl-names = "default";
- pinctrl-0 = <&main_uart0_pins_default>;
- status = "okay";
-};
&main_sdhci0 { /delete-property/ power-domains; /delete-property/ assigned-clocks; diff --git a/arch/arm/dts/k3-j7200-som-p0.dtsi b/arch/arm/dts/k3-j7200-som-p0.dtsi index 2694241547..7eaa2411a5 100644 --- a/arch/arm/dts/k3-j7200-som-p0.dtsi +++ b/arch/arm/dts/k3-j7200-som-p0.dtsi @@ -128,12 +128,15 @@ };
&main_pmx0 {
- main_i2c0_pins_default: main-i2c0-pins-default {
bootph-pre-ram;;};};
&hbmc {
2.34.1
a) Once we have the core dts changes in k.org.... b) sync u-boot back in. the bootph-pre-ram etc changes can come in via u-boot.dtsi at this point c) then get the ph-pre-ram etc changes into k.org d) drop them from u-boot.dtsi etc.
But, NOT yet.