The OMAP3 cpu directory contains a syslib file with some utilities that can be shared by all targets using arm cortexa8 processors, not only OMAP.
Signed-off-by: Stefano Babic sbabic@denx.de --- arch/arm/cpu/armv7/Makefile | 3 +- arch/arm/cpu/armv7/omap-common/Makefile | 1 - arch/arm/cpu/armv7/omap-common/syslib.c | 70 ---------------------------- arch/arm/cpu/armv7/syslib.c | 70 ++++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx51/sys_proto.h | 1 + 5 files changed, 73 insertions(+), 72 deletions(-) delete mode 100644 arch/arm/cpu/armv7/omap-common/syslib.c create mode 100644 arch/arm/cpu/armv7/syslib.c
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index ae20299..7743fef 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -27,6 +27,7 @@ LIB = $(obj)lib$(CPU).a
START := start.o COBJS := cpu.o +COBJS += syslib.o
SRCS := $(START:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) @@ -44,4 +45,4 @@ include $(SRCTREE)/rules.mk
sinclude $(obj).depend
-######################################################################### \ No newline at end of file +######################################################################### diff --git a/arch/arm/cpu/armv7/omap-common/Makefile b/arch/arm/cpu/armv7/omap-common/Makefile index caee726..aedea7b 100644 --- a/arch/arm/cpu/armv7/omap-common/Makefile +++ b/arch/arm/cpu/armv7/omap-common/Makefile @@ -28,7 +28,6 @@ LIB = $(obj)libomap-common.a SOBJS := reset.o
COBJS := timer.o -COBJS += syslib.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/arch/arm/cpu/armv7/omap-common/syslib.c b/arch/arm/cpu/armv7/omap-common/syslib.c deleted file mode 100644 index f9ed9a3..0000000 --- a/arch/arm/cpu/armv7/omap-common/syslib.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - * (C) Copyright 2008 - * Texas Instruments, <www.ti.com> - * - * Richard Woodruff r-woodruff2@ti.com - * Syed Mohammed Khasim khasim@ti.com - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/io.h> -#include <asm/arch/sys_proto.h> - -/************************************************************ - * sdelay() - simple spin loop. Will be constant time as - * its generally used in bypass conditions only. This - * is necessary until timers are accessible. - * - * not inline to increase chances its in cache when called - *************************************************************/ -void sdelay(unsigned long loops) -{ - __asm__ volatile ("1:\n" "subs %0, %1, #1\n" - "bne 1b":"=r" (loops):"0"(loops)); -} - -/***************************************************************** - * sr32 - clear & set a value in a bit range for a 32 bit address - *****************************************************************/ -void sr32(void *addr, u32 start_bit, u32 num_bits, u32 value) -{ - u32 tmp, msk = 0; - msk = 1 << num_bits; - --msk; - tmp = readl((u32)addr) & ~(msk << start_bit); - tmp |= value << start_bit; - writel(tmp, (u32)addr); -} - -/********************************************************************* - * wait_on_value() - common routine to allow waiting for changes in - * volatile regs. - *********************************************************************/ -u32 wait_on_value(u32 read_bit_mask, u32 match_value, void *read_addr, - u32 bound) -{ - u32 i = 0, val; - do { - ++i; - val = readl((u32)read_addr) & read_bit_mask; - if (val == match_value) - return 1; - if (i == bound) - return 0; - } while (1); -} diff --git a/arch/arm/cpu/armv7/syslib.c b/arch/arm/cpu/armv7/syslib.c new file mode 100644 index 0000000..f9ed9a3 --- /dev/null +++ b/arch/arm/cpu/armv7/syslib.c @@ -0,0 +1,70 @@ +/* + * (C) Copyright 2008 + * Texas Instruments, <www.ti.com> + * + * Richard Woodruff r-woodruff2@ti.com + * Syed Mohammed Khasim khasim@ti.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/sys_proto.h> + +/************************************************************ + * sdelay() - simple spin loop. Will be constant time as + * its generally used in bypass conditions only. This + * is necessary until timers are accessible. + * + * not inline to increase chances its in cache when called + *************************************************************/ +void sdelay(unsigned long loops) +{ + __asm__ volatile ("1:\n" "subs %0, %1, #1\n" + "bne 1b":"=r" (loops):"0"(loops)); +} + +/***************************************************************** + * sr32 - clear & set a value in a bit range for a 32 bit address + *****************************************************************/ +void sr32(void *addr, u32 start_bit, u32 num_bits, u32 value) +{ + u32 tmp, msk = 0; + msk = 1 << num_bits; + --msk; + tmp = readl((u32)addr) & ~(msk << start_bit); + tmp |= value << start_bit; + writel(tmp, (u32)addr); +} + +/********************************************************************* + * wait_on_value() - common routine to allow waiting for changes in + * volatile regs. + *********************************************************************/ +u32 wait_on_value(u32 read_bit_mask, u32 match_value, void *read_addr, + u32 bound) +{ + u32 i = 0, val; + do { + ++i; + val = readl((u32)read_addr) & read_bit_mask; + if (val == match_value) + return 1; + if (i == bound) + return 0; + } while (1); +} diff --git a/arch/arm/include/asm/arch-mx51/sys_proto.h b/arch/arm/include/asm/arch-mx51/sys_proto.h index bf500a8..f687503 100644 --- a/arch/arm/include/asm/arch-mx51/sys_proto.h +++ b/arch/arm/include/asm/arch-mx51/sys_proto.h @@ -26,5 +26,6 @@
u32 get_cpu_rev(void); #define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev) +void sdelay(unsigned long);
#endif