Re: [PATCH v2] arm: dts: socfpga: cyclone5: Update i2c-scl-falling-time-ns

On 6/10/20 7:24 AM, Ley Foon Tan wrote:

Commit e71b6f6622d6 ("i2c: designware_i2c: Rewrite timing calculation") change the hcnt and lcnt timing calculation. New timing calculation is based on calculation from Designware i2c databook.

After this new timing calculation, hcnt will have negative value with i2c-scl-falling-time-ns 5000 that set in socfpga_cyclone5_socdk.dts.

This patch overwrite i2c-scl-falling-time-ns to 300ns (default SCL fall time used in Designware i2c driver) for Uboot.

Applied, thanks.