On Thu, 18 Oct 2012 22:15:45 +0200, Albert ARIBAUD albert.u.boot@aribaud.net wrote:

SX1 does not build properly by itself, is not built as part of MAKEALL arm or MAKEALL -a arm, and is only present in Makefile, not boards.cfg. As it also has no entry in MAINTAINERS, it is orphan and non-functional. Remove it.

Signed-off-by: Albert ARIBAUD albert.u.boot@aribaud.net

Changes in v2:

• updated doc/README.scrapyard

Makefile | 14 -- board/sx1/Makefile | 45 ----- board/sx1/config.mk | 19 --- board/sx1/lowlevel_init.S | 397 --------------------------------------------- board/sx1/sx1.c | 123 -------------- doc/README.scrapyard | 3 +- include/configs/SX1.h | 189 --------------------- 7 files changed, 2 insertions(+), 788 deletions(-) delete mode 100644 board/sx1/Makefile delete mode 100644 board/sx1/config.mk delete mode 100644 board/sx1/lowlevel_init.S delete mode 100644 board/sx1/sx1.c delete mode 100644 include/configs/SX1.h

diff --git a/Makefile b/Makefile index 08eecbb..46f2ff2 100644 --- a/Makefile +++ b/Makefile @@ -748,20 +748,6 @@ $(obj).boards.depend: boards.cfg lcname = $(shell echo $(1) | sed -e 's/(.*)_config/\L\1/') ucname = $(shell echo $(1) | sed -e 's/(.*)_config/\U\1/')

-#======================================================================== -# ARM -#========================================================================

-SX1_stdout_serial_config \ -SX1_config: unconfig

• @mkdir -p $(obj)include
• @if [ "$(findstring _stdout_serial_, $@)" ] ; then \

• echo "#undef CONFIG_STDOUT_USBTTY" >> $(obj)include/config.h ; \
  

• else \

• echo "#define CONFIG_STDOUT_USBTTY" >> $(obj)include/config.h ; \
  

• fi;
• @$(MKCONFIG) -n $@ SX1 arm arm925t sx1

######################################################################### ## ARM1176 Systems ######################################################################### diff --git a/board/sx1/Makefile b/board/sx1/Makefile deleted file mode 100644 index 292459f..0000000 --- a/board/sx1/Makefile +++ /dev/null @@ -1,45 +0,0 @@ -# -# (C) Copyright 2004-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -#

-include $(TOPDIR)/config.mk

-LIB = $(obj)lib$(BOARD).o

-COBJS := sx1.o -SOBJS := lowlevel_init.o

-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS))

-$(LIB): $(obj).depend $(OBJS) $(SOBJS)

• $(call cmd_link_o_target, $(OBJS) $(SOBJS))

-#########################################################################

-# defines $(obj).depend target -include $(SRCTREE)/rules.mk

-sinclude $(obj).depend

-######################################################################### diff --git a/board/sx1/config.mk b/board/sx1/config.mk deleted file mode 100644 index 441bea2..0000000 --- a/board/sx1/config.mk +++ /dev/null @@ -1,19 +0,0 @@ -# -# (C) Copyright 2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de -# -# SX1 board with OMAP1510 (ARM925T) cpu -# see http://www.ti.com/ for more information on Texas Insturments -# -# SX1 has 1 bank of 256 MB SDRAM -# Physical Address: -# 1000'0000 to 2000'0000 -# -# -# Linux-Kernel is expected to be at 1000'8000, entry 1000'8000 (mem base + reserved) -# -# we load ourself to 1108'0000 -# -#

-CONFIG_SYS_TEXT_BASE = 0x11080000 diff --git a/board/sx1/lowlevel_init.S b/board/sx1/lowlevel_init.S deleted file mode 100644 index c1a811a..0000000 --- a/board/sx1/lowlevel_init.S +++ /dev/null @@ -1,397 +0,0 @@ -/*

• • Board specific setup info
• • (C) Copyright 2003
• • Texas Instruments, <www.ti.com>
• • -- Some bits of code used from rrload's head_OMAP1510.s --
• • Copyright (C) 2002 RidgeRun, Inc.
• • See file CREDITS for list of people who contributed to this
• • project.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• • You should have received a copy of the GNU General Public License
• • along with this program; if not, write to the Free Software
• • Foundation, Inc., 59 Temple Place, Suite 330, Boston,
• • MA 02111-1307 USA
• */

-#include <config.h> -#include <version.h>

-#if defined(CONFIG_OMAP1510) -#include <./configs/omap1510.h> -#endif

-#define OMAP1510_CLKS ((1<<EN_XORPCK)|(1<<EN_PERCK)|(1<<EN_TIMCK)|(1<<EN_GPIOCK))

-_TEXT_BASE:

• .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */

-.globl lowlevel_init -lowlevel_init:

• /*

• * Configure 1510 pins functions to match our board.
  

• */
  

• ldr r0, REG_PULL_DWN_CTRL_0
• ldr r1, VAL_PULL_DWN_CTRL_0
• str r1, [r0]
• ldr r0, REG_PULL_DWN_CTRL_1
• ldr r1, VAL_PULL_DWN_CTRL_1
• str r1, [r0]
• ldr r0, REG_PULL_DWN_CTRL_2
• ldr r1, VAL_PULL_DWN_CTRL_2
• str r1, [r0]
• ldr r0, REG_PULL_DWN_CTRL_3
• ldr r1, VAL_PULL_DWN_CTRL_3
• str r1, [r0]
• ldr r0, REG_FUNC_MUX_CTRL_4
• ldr r1, VAL_FUNC_MUX_CTRL_4
• str r1, [r0]
• ldr r0, REG_FUNC_MUX_CTRL_5
• ldr r1, VAL_FUNC_MUX_CTRL_5
• str r1, [r0]
• ldr r0, REG_FUNC_MUX_CTRL_6
• ldr r1, VAL_FUNC_MUX_CTRL_6
• str r1, [r0]
• ldr r0, REG_FUNC_MUX_CTRL_7
• ldr r1, VAL_FUNC_MUX_CTRL_7
• str r1, [r0]
• ldr r0, REG_FUNC_MUX_CTRL_8
• ldr r1, VAL_FUNC_MUX_CTRL_8
• str r1, [r0]
• ldr r0, REG_FUNC_MUX_CTRL_9
• ldr r1, VAL_FUNC_MUX_CTRL_9
• str r1, [r0]
• ldr r0, REG_FUNC_MUX_CTRL_A
• ldr r1, VAL_FUNC_MUX_CTRL_A
• str r1, [r0]
• ldr r0, REG_FUNC_MUX_CTRL_B
• ldr r1, VAL_FUNC_MUX_CTRL_B
• str r1, [r0]
• ldr r0, REG_FUNC_MUX_CTRL_C
• ldr r1, VAL_FUNC_MUX_CTRL_C
• str r1, [r0]
• ldr r0, REG_FUNC_MUX_CTRL_D
• ldr r1, VAL_FUNC_MUX_CTRL_D
• str r1, [r0]
• ldr r0, REG_VOLTAGE_CTRL_0
• ldr r1, VAL_VOLTAGE_CTRL_0
• str r1, [r0]
• ldr r0, REG_TEST_DBG_CTRL_0
• ldr r1, VAL_TEST_DBG_CTRL_0
• str r1, [r0]
• ldr r0, REG_MOD_CONF_CTRL_0
• ldr r1, VAL_MOD_CONF_CTRL_0
• str r1, [r0]
• /* Move to 1510 mode */
• ldr r0, REG_COMP_MODE_CTRL_0
• ldr r1, VAL_COMP_MODE_CTRL_0
• str r1, [r0]
• /* Set up Traffic Ctlr*/
• ldr r0, REG_TC_IMIF_PRIO
• mov r1, #0x0
• str r1, [r0]
• ldr r0, REG_TC_EMIFS_PRIO
• str r1, [r0]
• ldr r0, REG_TC_EMIFF_PRIO
• str r1, [r0]
• ldr r0, REG_TC_EMIFS_CONFIG
• ldr r1, [r0]
• bic r1, r1, #0x08 /* clear the global power-down enable PDE bit */
• bic r1, r1, #0x01 /* write protect flash by clearing the WP bit */
• str r1, [r0] /* EMIFS GlB Configuration. (value 0x12 most likely) */
• ldr r0, _GPIO_PIN_CONTROL_REG
• mov r1,#0
• orr r1, r1, #0x0001 /* M_PCM_SYNC */
• orr r1, r1, #0x4000 /* IPC_ACTIVE */
• strh r1,[r0]
• ldr r0, _GPIO_DIR_CONTROL_REG
• mov r1,#0
• bic r1, r1, #0x0001 /* M_PCM_SYNC */
• bic r1, r1, #0x4000 /* IPC_ACTIVE */
• strh r1,[r0]
• ldr r0, _GPIO_DATA_OUTPUT_REG
• mov r1,#0
• bic r1, r1, #0x0001 /* M_PCM_SYNC */
• orr r1, r1, #0x4000 /* IPC_ACTIVE */
• strh r1,[r0]
• /* Setup some clock domains */
• ldr r1, =OMAP1510_CLKS
• ldr r0, REG_ARM_IDLECT2
• strh r1, [r0] /* CLKM, Clock domain control. */
• mov r1, #0x01 /* PER_EN bit */
• ldr r0, REG_ARM_RSTCT2
• strh r1, [r0] /* CLKM; Peripheral reset. */
• /* Set CLKM to Sync-Scalable */
• /* I supposidly need to enable the dsp clock before switching */
• mov r1, #0x1000
• ldr r0, REG_ARM_SYSST
• strh r1, [r0]
• mov r0, #0x400

-1:

• subs r0, r0, #0x1 /* wait for any bubbles to finish */
• bne 1b
• ldr r1, VAL_ARM_CKCTL /* use 12Mhz ref, PER must be <= 50Mhz so /2 */
• ldr r0, REG_ARM_CKCTL
• strh r1, [r0]
• /* setup DPLL 1 */
• ldr r1, VAL_DPLL1_CTL
• ldr r0, REG_DPLL1_CTL
• strh r1, [r0]
• ands r1, r1, #0x10 /* Check if PLL is enabled. */
• beq lock_end /* Do not look for lock if BYPASS selected */

-2:

• ldrh r1, [r0]
• ands r1, r1, #0x01 /* Check the LOCK bit. */
• beq 2b /* ...loop until bit goes hi. */

-lock_end:

• /* Set memory timings corresponding to the new clock speed */
• /* Check execution location to determine current execution location

• * and branch to appropriate initialization code.
  

• */
  

• mov r0, #0x10000000 /* Load physical SDRAM base. */
• mov r1, pc /* Get current execution location. */
• cmp r1, r0 /* Compare. */
• bge skip_sdram /* Skip over EMIF-fast initialization if running from SDRAM. */
• /*

• * Delay for SDRAM initialization.
  

• */
  

• mov r3, #0x1800 /* value should be checked */

-3:

• subs r3, r3, #0x1 /* Decrement count */
• bne 3b
• /*

• * Set SDRAM control values. Disable refresh before MRS command.
  

• */
  

• ldr r0, VAL_TC_EMIFF_SDRAM_CONFIG /* get good value */
• bic r3, r0, #0xC /* (BIT3|BIT2) ulConfig with auto-refresh disabled. */
• orr r3, r3, #0x8000000 /* (BIT27) Disable CLK when Power down or Self-Refresh */
• orr r3, r3, #0x4000000 /* BIT26 Power Down Enable */
• ldr r2, REG_TC_EMIFF_SDRAM_CONFIG /* Point to configuration register. */
• str r3, [r2] /* Store the passed value with AR disabled. */
• ldr r1, VAL_TC_EMIFF_MRS /* get MRS value */
• ldr r2, REG_TC_EMIFF_MRS /* Point to MRS register. */
• str r1, [r2] /* Store the passed value.*/
• ldr r2, REG_TC_EMIFF_SDRAM_CONFIG /* Point to configuration register. */
• str r0, [r2] /* Store the passed value. */
• /*

• * Delay for SDRAM initialization.
  

• */
  

• mov r3, #0x1800

-4:

• subs r3, r3, #1 /* Decrement count. */
• bne 4b

-skip_sdram:

• /* slow interface */
• ldr r1, VAL_TC_EMIFS_CS0_CONFIG
• ldr r0, REG_TC_EMIFS_CS0_CONFIG
• str r1, [r0] /* Chip Select 0 */
• ldr r1, VAL_TC_EMIFS_CS1_CONFIG
• ldr r0, REG_TC_EMIFS_CS1_CONFIG
• str r1, [r0] /* Chip Select 1 */
• ldr r1, VAL_TC_EMIFS_CS2_CONFIG
• ldr r0, REG_TC_EMIFS_CS2_CONFIG
• str r1, [r0] /* Chip Select 2 */
• ldr r1, VAL_TC_EMIFS_CS3_CONFIG
• ldr r0, REG_TC_EMIFS_CS3_CONFIG
• str r1, [r0] /* Chip Select 3 */
• /* back to arch calling code */
• mov pc, lr

-/* the literal pools origin */

• .ltorg

-/* OMAP configuration registers */ -REG_FUNC_MUX_CTRL_0: /* 32 bits */

• .word 0xfffe1000

-REG_FUNC_MUX_CTRL_1: /* 32 bits */

• .word 0xfffe1004

-REG_FUNC_MUX_CTRL_2: /* 32 bits */

• .word 0xfffe1008

-REG_COMP_MODE_CTRL_0: /* 32 bits */

• .word 0xfffe100c

-REG_FUNC_MUX_CTRL_3: /* 32 bits */

• .word 0xfffe1010

-REG_FUNC_MUX_CTRL_4: /* 32 bits */

• .word 0xfffe1014

-REG_FUNC_MUX_CTRL_5: /* 32 bits */

• .word 0xfffe1018

-REG_FUNC_MUX_CTRL_6: /* 32 bits */

• .word 0xfffe101c

-REG_FUNC_MUX_CTRL_7: /* 32 bits */

• .word 0xfffe1020

-REG_FUNC_MUX_CTRL_8: /* 32 bits */

• .word 0xfffe1024

-REG_FUNC_MUX_CTRL_9: /* 32 bits */

• .word 0xfffe1028

-REG_FUNC_MUX_CTRL_A: /* 32 bits */

• .word 0xfffe102C

-REG_FUNC_MUX_CTRL_B: /* 32 bits */

• .word 0xfffe1030

-REG_FUNC_MUX_CTRL_C: /* 32 bits */

• .word 0xfffe1034

-REG_FUNC_MUX_CTRL_D: /* 32 bits */

• .word 0xfffe1038

-REG_PULL_DWN_CTRL_0: /* 32 bits */

• .word 0xfffe1040

-REG_PULL_DWN_CTRL_1: /* 32 bits */

• .word 0xfffe1044

-REG_PULL_DWN_CTRL_2: /* 32 bits */

• .word 0xfffe1048

-REG_PULL_DWN_CTRL_3: /* 32 bits */

• .word 0xfffe104c

-REG_VOLTAGE_CTRL_0: /* 32 bits */

• .word 0xfffe1060

-REG_TEST_DBG_CTRL_0: /* 32 bits */

• .word 0xfffe1070

-REG_MOD_CONF_CTRL_0: /* 32 bits */

• .word 0xfffe1080

-REG_TC_IMIF_PRIO: /* 32 bits */

• .word 0xfffecc00

-REG_TC_EMIFS_PRIO: /* 32 bits */

• .word 0xfffecc04

-REG_TC_EMIFF_PRIO: /* 32 bits */

• .word 0xfffecc08

-REG_TC_EMIFS_CONFIG: /* 32 bits */

• .word 0xfffecc0c

-REG_TC_EMIFS_CS0_CONFIG: /* 32 bits */

• .word 0xfffecc10

-REG_TC_EMIFS_CS1_CONFIG: /* 32 bits */

• .word 0xfffecc14

-REG_TC_EMIFS_CS2_CONFIG: /* 32 bits */

• .word 0xfffecc18

-REG_TC_EMIFS_CS3_CONFIG: /* 32 bits */

• .word 0xfffecc1c

-REG_TC_EMIFF_SDRAM_CONFIG: /* 32 bits */

• .word 0xfffecc20

-REG_TC_EMIFF_MRS: /* 32 bits */

• .word 0xfffecc24

-/* MPU clock/reset/power mode control registers */ -REG_ARM_CKCTL: /* 16 bits */

• .word 0xfffece00

-REG_ARM_IDLECT2: /* 16 bits */

• .word 0xfffece08

-REG_ARM_RSTCT2: /* 16 bits */

• .word 0xfffece14

-REG_ARM_SYSST: /* 16 bits */

• .word 0xfffece18

-/* DPLL control registers */ -REG_DPLL1_CTL: /* 16 bits */

• .word 0xfffecf00

-/* identification code register */ -REG_IDCODE: /* 32 bits */

• .word 0xfffed404

-/* SX1 specific */ -_GPIO_PIN_CONTROL_REG:

• .word GPIO_PIN_CONTROL_REG

-_GPIO_DIR_CONTROL_REG:

• .word GPIO_DIR_CONTROL_REG

-_GPIO_DATA_OUTPUT_REG:

• .word GPIO_DATA_OUTPUT_REG

-VAL_COMP_MODE_CTRL_0:

• .word 0x0000eaef

-VAL_FUNC_MUX_CTRL_4:

• .word 0x00000000

-VAL_FUNC_MUX_CTRL_5:

• .word 0x00000000

-VAL_FUNC_MUX_CTRL_6:

• .word 0x00000001

-VAL_FUNC_MUX_CTRL_7:

• .word 0x00001000

-VAL_FUNC_MUX_CTRL_8:

• .word 0x00001240 /*[Knoller] Value of Symbian Image Wing B2*/

-VAL_FUNC_MUX_CTRL_9:

• .word 0x00201008

-VAL_FUNC_MUX_CTRL_A:

• .word 0x00001000

-VAL_FUNC_MUX_CTRL_B:

• .word 0x00000000

-VAL_FUNC_MUX_CTRL_C:

• .word 0x09008001 /*[Knoller] Value of Symbian Image Wing B2*/

-VAL_FUNC_MUX_CTRL_D:

• .word 0x00000000

-VAL_PULL_DWN_CTRL_0:

• .word 0xfffeffff

-VAL_PULL_DWN_CTRL_1:

• .word 0xd1ffffec

-VAL_PULL_DWN_CTRL_2:

• .word 0xffa80c5b

-VAL_PULL_DWN_CTRL_3:

• .word 0xffffc0fe

-VAL_VOLTAGE_CTRL_0:

• .word 0x00000007

-VAL_TEST_DBG_CTRL_0:

• /* The OMAP5910 TRM says this register must be 0, but HelenConfRegs

• * says to write a 7.  Don't know what the right thing is to do, so
  

• * I'm leaving it at 7 since that's what was already here.
  

• */
  

• .word 0x00000007

-VAL_MOD_CONF_CTRL_0:

• .word 0x0da20000 /*[Knoller] Value of Symbian Image Wing B2*/

-VAL_ARM_CKCTL:

• .word 0x010D

-VAL_DPLL1_CTL:

• .word 0x3A33 /*[Hertle] Value of Symbian Image*/

-VAL_TC_EMIFS_CS1_CONFIG_PRELIM:

• .word 0x00001149

-VAL_TC_EMIFS_CS2_CONFIG_PRELIM:

• .word 0x00004158

-VAL_TC_EMIFS_CS0_CONFIG:

• .word 0x00213090 /*[Knoller] Value of Symbian Image Wing B2*/

-VAL_TC_EMIFS_CS1_CONFIG:

• .word 0x00215070 /*[Knoller] Value of Symbian Image Wing B2*/

-VAL_TC_EMIFS_CS2_CONFIG:

• .word 0x00001139 /*[Knoller] Value of Symbian Image Wing B2*/

-VAL_TC_EMIFS_CS3_CONFIG:

• .word 0x00001139 /*[Knoller] Value of Symbian Image Wing B2*/

-VAL_TC_EMIFF_SDRAM_CONFIG:

• .word 0x0105f0b4 /*[Knoller] Value of Symbian Image Wing B2*/

-VAL_TC_EMIFF_MRS:

• .word 0x00000027 /*[Knoller] Value of Symbian Image Wing B2*/

diff --git a/board/sx1/sx1.c b/board/sx1/sx1.c deleted file mode 100644 index aaef76e..0000000 --- a/board/sx1/sx1.c +++ /dev/null @@ -1,123 +0,0 @@ -/*

• • (C) Copyright 2004
• • Wolfgang Denk, DENX Software Engineering, wd@denx.de
• • (C) Copyright 2003
• • Texas Instruments, <www.ti.com>
• • Kshitij Gupta Kshitij@ti.com
• • See file CREDITS for list of people who contributed to this
• • project.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• • You should have received a copy of the GNU General Public License
• • along with this program; if not, write to the Free Software
• • Foundation, Inc., 59 Temple Place, Suite 330, Boston,
• • MA 02111-1307 USA
• */

-#include <common.h>

-DECLARE_GLOBAL_DATA_PTR;

-static void flash__init (void); -static void ether__init (void);

-static inline void delay (unsigned long loops) -{

• __asm__ volatile ("1:\n"

• 	  "subs %0, %1, #1\n"
  

• 	  "bne 1b":"=r" (loops):"0" (loops));
  

-}

-/*

• • Miscellaneous platform dependent initialisations
• */

-int board_init (void) -{

• /* arch number of SX1 Board */
• gd->bd->bi_arch_number = MACH_TYPE_SX1;
• /* adress of boot parameters */
• gd->bd->bi_boot_params = 0x10000100;

-/* kk - this speeds up your boot a quite a bit. However to make it

• • work, you need make sure your kernel startup flush bug is fixed.
• • ... rkw ...
• */
• icache_enable ();
• flash__init ();
• ether__init ();
• return 0;

-}

-int misc_init_r (void) -{

• /* volatile ushort *gdir = (ushort *) (GPIO_DIR_CONTROL_REG); */
• /* volatile ushort *mdir = (ushort *) (MPUIO_DIR_CONTROL_REG); */
• /* setup gpio direction to match board (no floats!) */
• /**gdir = 0xCFF9; */
• /**mdir = 0x103F; */
• return (0);

-}

-/******************************

• Routine:
• Description:

-******************************/ -static void flash__init (void) -{ -#define CS0_CHIP_SELECT_REG 0xfffecc10 -#define CS3_CHIP_SELECT_REG 0xfffecc1c -#define EMIFS_GlB_Config_REG 0xfffecc0c

• unsigned int regval;
• regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
• regval = regval | 0x0001; /* Turn off write protection for flash devices. */
• if (regval & 0x0002) {

• regval = regval & 0xfffd;	/* Swap CS0 and CS3 so that flash is visible at 0x0 and eeprom at 0x0c000000. */
  

• /* If, instead, you want to reference flash at 0x0c000000, then it seemed the following were necessary. */
  

• /* *((volatile unsigned int *)CS0_CHIP_SELECT_REG) = 0x202090; / * Overrides head.S setting of 0x212090 */
  

• /* *((volatile unsigned int *)CS3_CHIP_SELECT_REG) = 0x202090; / * Let's flash chips be fully functional. */
  

• }
• *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;

-}

-/******************************

• Routine:
• Description:

-******************************/ -static void ether__init (void) -{ -#define ETH_CONTROL_REG 0x0800000b

• /* take the Ethernet controller out of reset and wait

• * for the EEPROM load to complete.
  

• */
  

• *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
• udelay (3);

-}

-int dram_init (void) -{

• gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
• gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
• return 0;

-} diff --git a/doc/README.scrapyard b/doc/README.scrapyard index d0f4716..ed779e2 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -11,7 +11,8 @@ easily if here is something they might want to dig for...

Board Arch CPU removed Commit last known maintainer/contact

-TQM85xx powerpc MPC85xx - - Stefan Roese sr@denx.de +SX1 arm arm925t - - +TQM85xx powerpc MPC85xx d923a5d5 2012-10-04 Stefan Roese sr@denx.de apollon arm omap24xx 535c74f 2012-09-18 Kyungmin Park kyungmin.park@samsung.com tb0229 mips mips32 3f3110d 2011-12-12 rmu powerpc MPC850 fb82fd7 2011-12-07 Wolfgang Denk wd@denx.de diff --git a/include/configs/SX1.h b/include/configs/SX1.h deleted file mode 100644 index 93d031c..0000000 --- a/include/configs/SX1.h +++ /dev/null @@ -1,189 +0,0 @@ -/*

• • (C) Copyright 2004
• • Wolfgang Denk, DENX Software Engineering, wd@denx.de.
• • See file CREDITS for list of people who contributed to this
• • project.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• • You should have received a copy of the GNU General Public License
• • along with this program; if not, write to the Free Software
• • Foundation, Inc., 59 Temple Place, Suite 330, Boston,
• • MA 02111-1307 USA
• */

-#ifndef __CONFIG_H -#define __CONFIG_H

-/*

• • High Level Configuration Options
• • (easy to change)
• */

-#define CONFIG_ARM925T 1 /* This is an arm925t CPU */ -#define CONFIG_OMAP 1 /* in a TI OMAP core */ -#define CONFIG_OMAP1510 1 /* which is in a 1510 (helen) */ -#define CONFIG_OMAP_SX1 1 /* a SX1 Board */

-/* input clock of PLL */ -#define CONFIG_SYS_CLK_FREQ 12000000 /* the SX1 has 12MHz input clock */

-#define CONFIG_MISC_INIT_R

-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1

-/*

• • Size of malloc() pool
• */

-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)

-/*

• • Hardware drivers
• */

-/*

• • NS16550 Configuration
• */

-#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK (CONFIG_SYS_CLK_FREQ) /* can be 12M/32Khz or 48Mhz */ -#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */

-/*

• • select serial console configuration
• */

-#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SX1 */

-/*

• • USB device configuration
• */

-#define CONFIG_USB_DEVICE 1 -#define CONFIG_USB_TTY 1

-#define CONFIG_USBD_VENDORID 0x1234 -#define CONFIG_USBD_PRODUCTID 0x5678 -#define CONFIG_USBD_MANUFACTURER "Siemens" -#define CONFIG_USBD_PRODUCT_NAME "SX1"

-/*

• • I2C configuration
• */

-#define CONFIG_HARD_I2C -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 1 -#define CONFIG_DRIVER_OMAP1510_I2C

-#define CONFIG_ENV_OVERWRITE

-#define CONFIG_ENV_OVERWRITE -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200

-/*

• • BOOTP options
• */

-#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME

-/*

• • Command line configuration.
• */

-#include <config_cmd_default.h>

-#define CONFIG_CMD_I2C

-#undef CONFIG_CMD_NET

-#include <configs/omap1510.h>

-#define CONFIG_BOOTARGS "mem=16M console=ttyS0,115200n8 root=/dev/mtdblock3 rw" -#ifdef CONFIG_STDOUT_USBTTY -#define CONFIG_PREBOOT "setenv stdout usbtty;setenv stdin usbtty" -#endif

-/*

• • Miscellaneous configurable options
• */

-#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "SX1# " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */

-#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */

-#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */

-/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.

• • This time is further subdivided by a local divisor.
• */

-#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE /* use timer 1 */ -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ -#define CONFIG_SYS_HZ 1000

-/*-----------------------------------------------------------------------

• • Physical Memory Map
• */

-#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */

-#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -#define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */

-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1

-/*-----------------------------------------------------------------------

• • FLASH and environment organization
• • V1
• • PHYS_FLASH_SIZE_1 (16 << 10) 16 MB
• • PHYS_FLASH_SIZE_2 (8 << 10) 8 MB
• • V2 only 1 flash
• • PHYS_FLASH_SIZE_1 (32 << 10) 32 MB
• */

-#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ -#define PHYS_FLASH_SECT_SIZE (128*1024) /* Size of a sector (128kB) */ -#define CONFIG_SYS_MAX_FLASH_SECT (256) /* max number of sectors on one chip */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SECT_SIZE) /* addr of environment */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */ -#define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE /* Reserve 1 sector */ -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, PHYS_FLASH_2 }

-/*-----------------------------------------------------------------------

• • FLASH driver setup
• */

-#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */ -#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */

-/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */

-#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE -#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE /* Total Size of Environment Sector */ -#define CONFIG_ENV_OFFSET ( CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN ) /* Environment after Monitor */

-/* Address and size of Redundant Environment Sector */ -#define CONFIG_ENV_SIZE_REDUND 0x20000 -#define CONFIG_ENV_OFFSET_REDUND 0x40000

-#endif /* __CONFIG_H */

After 7 days without comments on V2, applied to u-boot-arm/master.

Amicalement,