As requested by driver model migration plan, it adds driver model support, i.e. CONFIG_DM_MMC, for hi6220_dw_mmc driver.
Signed-off-by: Shawn Guo shawn.guo@linaro.org --- drivers/mmc/hi6220_dw_mmc.c | 83 +++++++++++++++++++++++++++++++++++++ 1 file changed, 83 insertions(+)
diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c index ce395d53c942..e0de92418274 100644 --- a/drivers/mmc/hi6220_dw_mmc.c +++ b/drivers/mmc/hi6220_dw_mmc.c @@ -23,11 +23,13 @@ static int hi6220_dwmci_core_init(struct dwmci_host *host, int index)
host->dev_index = index;
+#ifndef CONFIG_BLK /* Add the mmc channel to be registered with mmc core */ if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) { printf("DWMMC%d registration failed\n", index); return -1; } +#endif return 0; }
@@ -53,3 +55,84 @@ int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width)
return hi6220_dwmci_core_init(host, index); } + +#ifdef CONFIG_DM_MMC +#include <dm.h> +DECLARE_GLOBAL_DATA_PTR; + +struct hi6220_mmc_plat { + struct mmc_config cfg; + struct mmc mmc; +}; + +struct hi6220_dwmmc_priv { + struct dwmci_host host; + int fifo_depth; +}; + +static int hi6220_dwmmc_ofdata_to_platdata(struct udevice *dev) +{ + struct hi6220_dwmmc_priv *priv = dev_get_priv(dev); + struct dwmci_host *host = &priv->host; + int ret; + + host->priv = dev; + host->name = dev->name; + host->ioaddr = dev_read_addr_ptr(dev); + host->bus_hz = MMC0_DEFAULT_FREQ; + host->buswidth = dev_read_u32_default(dev, "bus-width", 4); + priv->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); + + ret = dev_read_alias_seq(dev, &host->dev_index); + if (ret < 0) { + debug("%s: failed to get alias: %d\n", __func__, ret); + return ret; + } + + return 0; +} + +static int hi6220_dwmmc_probe(struct udevice *dev) +{ + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct hi6220_dwmmc_priv *priv = dev_get_priv(dev); + struct hi6220_mmc_plat *plat = dev_get_platdata(dev); + struct dwmci_host *host = &priv->host; + + host->fifoth_val = MSIZE(0x2) | + RX_WMARK(priv->fifo_depth / 2 - 1) | + TX_WMARK(priv->fifo_depth / 2); + + dwmci_setup_cfg(&plat->cfg, host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ); + host->mmc = &plat->mmc; + host->mmc->priv = &priv->host; + host->priv = dev; + upriv->mmc = host->mmc; + + return dwmci_probe(dev); +} + +static int hi6220_dwmmc_bind(struct udevice *dev) +{ + struct hi6220_mmc_plat *plat = dev_get_platdata(dev); + + return dwmci_bind(dev, &plat->mmc, &plat->cfg); +} + +static const struct udevice_id hi6220_dwmmc_ids[] = { + { .compatible = "hisilicon,hi3798cv200-dw-mshc" }, + { } +}; + +U_BOOT_DRIVER(hi6220_dwmmc_drv) = { + .name = "hi6220_dwmmc", + .id = UCLASS_MMC, + .of_match = hi6220_dwmmc_ids, + .ofdata_to_platdata = hi6220_dwmmc_ofdata_to_platdata, + .bind = hi6220_dwmmc_bind, + .ops = &dm_dwmci_ops, + .probe = hi6220_dwmmc_probe, + .priv_auto_alloc_size = sizeof(struct hi6220_dwmmc_priv), + .platdata_auto_alloc_size = sizeof(struct hi6220_mmc_plat), +}; +#endif