Hi Prafulla,
On Thu, Dec 2, 2010 at 2:54 PM, Prafulla Wadaskar prafulla@marvell.com wrote:
-----Original Message----- From: Lei Wen [mailto:adrian.wenl@gmail.com] Sent: Wednesday, December 01, 2010 7:51 PM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de; Eric Miao; Manas Saksena; Lei Wen; Yu Tang; Ashish Karkare; Kiran Vedere; Prabhanjan Sarnaik Subject: Re: [U-Boot] [PATCH v3 3/7] [REPOST-1] gpio: Add Multi-Function- Pin configuration driver for Marvell SoCs
Hi Prafulla,
...snip...
- /* the offset address are divided in three regions and
not
- * consecutive, this corrects the same (Ref: Specs:
A1.1) */
- p_mfpr = (u32 *)MFPR_BASE;
- if ( mfpr_no < 37)
- p_mfpr += (0x004c / 4) + mfpr_no;
- else if ( mfpr_no >= 56)
- p_mfpr += (0x00e0 / 4) + (mfpr_no - 56);
- else
- p_mfpr += (mfpr_no - 37);
This three regions is only meaningful for armada100, so when we use the mfp.c to other cpu, like pxa920, how could we reuse this setting? Obviously, pxa920 is different with armada100 regions arrangement, with the start mfp of ND_IO[15].
Currently mfp is added for armada100, I don't know what will be diffs with other SoCs. When other SoC will come up, we will modify this file :-)
Since the mfp.c is for generic case, and should be made as generic at the beginning... Current this is only hard coding, I think provide some kind of mapping would be good.
Best regards, Lei