8 Jan
2023
8 Jan
'23
4:48 p.m.
On Sat, 7 Jan 2023 at 14:57, Simon Glass sjg@chromium.org wrote:
This board is useful for benchmarking overall U-Boot performance. Enable the bootstage feature so we get a report.
Since this returns to the boot rom before finishing executing board_init_r() in SPL, add a few bootstage calls so that we can collect timing from TPL.
For the stash region, use a portion of SRAM, 64KB below the stack top. This allows the TPL image to be up to nearly 120KB (it is typically about 64KB). SPL normally runs from SDRAM at 0, so can use the same stash region.
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v2:
- Drop unwanted debugging
arch/arm/mach-rockchip/tpl.c | 16 +++++++++++++--- configs/rockpro64-rk3399_defconfig | 8 ++++++++ 2 files changed, 21 insertions(+), 3 deletions(-)
Applied to u-boot-dm/next