From: Hou Zhiqiang Zhiqiang.Hou@nxp.com
Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com --- arch/arm/cpu/armv8/Kconfig | 36 +++++++++++++++++++++++++++++++++++ arch/arm/cpu/armv8/Makefile | 2 +- arch/arm/cpu/armv8/sec_firmware_asm.S | 4 ++-- include/configs/ls1043ardb.h | 4 ---- include/configs/ls1046ardb.h | 4 ---- 5 files changed, 39 insertions(+), 11 deletions(-)
diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 7e1fc4c..cb5a970 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -21,4 +21,40 @@ config ARMV8_SPIN_TABLE - Reserve the code for the spin-table and the release address via a /memreserve/ region in the Device Tree.
+menu "ARMv8 secure monitor firmware" +config ARMV8_SEC_FIRMWARE_SUPPORT + bool "Enable ARMv8 secure monitor firmware framework support" + select OF_LIBFDT + select FIT + help + This framework is aimed at making secure monitor firmware load + process brief. + Note: Only FIT format image is supported. + You should prepare and provide the below information: + - Address of secure firmware. + - Address to hold the return address from secure firmware. + - Secure firmware FIT image related information. + Such as: SEC_FIRMWARE_FIT_IMAGE and SEC_FIRMEWARE_FIT_CNF_NAME + - The target exception level that secure monitor firmware will + return to. + +config SPL_ARMV8_SEC_FIRMWARE_SUPPORT + bool "Enable ARMv8 secure monitor firmware framework support for SPL" + select SPL_OF_LIBFDT + select SPL_FIT + help + Say Y here to support this framework in SPL phase. + +config ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT + bool "ARMv8 secure monitor firmware ERET address byteorder swap" + depends on ARMV8_SEC_FIRMWARE_SUPPORT || SPL_ARMV8_SEC_FIRMWARE_SUPPORT + help + Say Y here when the endianness of the register or memory holding the + Secure firmware exception return address is different with core's. + +endmenu + +config ARMV8_PSCI + bool "ARMv8 PSCI support" + endif diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile index dea1465..9f65927 100644 --- a/arch/arm/cpu/armv8/Makefile +++ b/arch/arm/cpu/armv8/Makefile @@ -19,7 +19,7 @@ obj-y += cpu-dt.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_ARMV8_SPIN_TABLE) += spin_table.o spin_table_v8.o endif -obj-$(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o +obj-$(CONFIG_$(SPL_)ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o
obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/ obj-$(CONFIG_S32V234) += s32v234/ diff --git a/arch/arm/cpu/armv8/sec_firmware_asm.S b/arch/arm/cpu/armv8/sec_firmware_asm.S index 0c6a462..15fbe0b 100644 --- a/arch/arm/cpu/armv8/sec_firmware_asm.S +++ b/arch/arm/cpu/armv8/sec_firmware_asm.S @@ -23,12 +23,12 @@ WEAK(_sec_firmware_entry) /* Set exception return address hold pointer */ adr x4, 1f mov x3, x4 -#ifdef SEC_FIRMWARE_ERET_ADDR_REVERT +#ifdef CONFIG_ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT rev w3, w3 #endif str w3, [x1] lsr x3, x4, #32 -#ifdef SEC_FIRMWARE_ERET_ADDR_REVERT +#ifdef CONFIG_ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT rev w3, w3 #endif str w3, [x2] diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 70ee046..4b4d090 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -10,10 +10,6 @@ #include "ls1043a_common.h"
#if defined(CONFIG_FSL_LS_PPA) -#define CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT -#define SEC_FIRMWARE_ERET_ADDR_REVERT -#define CONFIG_ARMV8_PSCI - #define CONFIG_SYS_LS_PPA_FW_IN_XIP #ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP #define CONFIG_SYS_LS_PPA_FW_ADDR 0x60500000 diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 693cc8d..85a58b0 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -10,10 +10,6 @@ #include "ls1046a_common.h"
#if defined(CONFIG_FSL_LS_PPA) -#define CONFIG_ARMV8_PSCI -#define CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT -#define CONFIG_SYS_LS_PPA_DRAM_BLOCK_MIN_SIZE (1UL * 1024 * 1024) - #define CONFIG_SYS_LS_PPA_FW_IN_XIP #ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP #define CONFIG_SYS_LS_PPA_FW_ADDR 0x40500000