Define CONFIG_SYS_EMAC_TI_CLKDIV for setting the clkdiv value in the MDIO control register.
Signed-off-by: Heiko Schocher hs@denx.de cc: Sandeep Paulraj s-paulraj@ti.com cc: Wolfgang Denk wd@denx.de --- drivers/net/davinci_emac.c | 9 +++++++-- 1 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c index 66c0d13..c911b64 100644 --- a/drivers/net/davinci_emac.c +++ b/drivers/net/davinci_emac.c @@ -53,6 +53,11 @@ unsigned int emac_dbg = 0; #define emac_gigabit_enable() /* no gigabit to enable */ #endif
+#if !defined(CONFIG_SYS_EMAC_TI_CLKDIV) +#define CONFIG_SYS_EMAC_TI_CLKDIV ((EMAC_MDIO_BUS_FREQ / \ + EMAC_MDIO_CLOCK_FREQ) - 1) +#endif + static void davinci_eth_mdio_enable(void);
static int gen_init_phy(int phy_addr); @@ -126,7 +131,7 @@ static void davinci_eth_mdio_enable(void) { u_int32_t clkdiv;
- clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1; + clkdiv = CONFIG_SYS_EMAC_TI_CLKDIV;
writel((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | @@ -427,7 +432,7 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis) #endif
/* Init MDIO & get link state */ - clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1; + clkdiv = CONFIG_SYS_EMAC_TI_CLKDIV; writel((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT, &adap_mdio->CONTROL);