Hi Alper,
On Tue, 11 Jan 2022 at 06:40, Alper Nebi Yasak alpernebiyasak@gmail.com wrote:
The Rockchip RK3399 eMMC PHY has to be power-cycled while changing its clock speed to some higher speeds. This is dependent on the desired SDHCI clock speed, and it looks like the PHY should be powered off while setting the SDHCI clock in these cases.
Commit ac804143cfd1 ("mmc: rockchip_sdhci: add phy and clock config for rk3399") attempts to do this in the set_ios_post() hook by setting the SDHCI clock once more while the PHY is turned off/on as necessary, as the SDHCI framework does not provide a way to override how it sets its clock. However, the commit breaks reinitializing the eMMC on a few boards including chromebook_kevin and reportedly ROCKPro64.
This patch reworks the power cycling to utilize the SDHCI framework slightly better (using the set_control_reg() hook to power off the PHY and set_ios_post() hook to power it back on) which happens to fix the issue, at least on a chromebook_kevin.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
RK3568 parts only build-tested as I don't have a RK3568 board.
Changes in v2:
- Add this patch
drivers/mmc/rockchip_sdhci.c | 53 +++++++++++++++++++++++++++++------- 1 file changed, 43 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c index 278473899c7c..f0d7ba4774d6 100644 --- a/drivers/mmc/rockchip_sdhci.c +++ b/drivers/mmc/rockchip_sdhci.c @@ -90,9 +90,10 @@ struct rockchip_sdhc { };
struct sdhci_data {
int (*emmc_set_clock)(struct sdhci_host *host, unsigned int clock); int (*emmc_phy_init)(struct udevice *dev); int (*get_phy)(struct udevice *dev);
void (*set_control_reg)(struct sdhci_host *host);int (*set_ios_post)(struct sdhci_host *host);
These should each have a full function comment.
I don't see the kevin patches applied yet...what is happening there?
[..]
Regards, Simon