From: Chris Morgan macromorgan@hotmail.com
The Odroid Go Advance uses a Rockchip Serial Flash Controller with an XT25F128B SPI NOR flash chip. This adds support for both. Note that while both the controller and chip support quad mode, only two lines are connected to the chip. Changing the pinctrl to bus2 and setting tx and rx lines to 2 for this reason.
Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Jon Lin jon.lin@rock-chips.com ---
Changes in v8: - Change to use tx single line to make a good compatible - Change spiflash dts node
arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi | 17 +++++++++++++++++ arch/arm/dts/rk3326-odroid-go2.dts | 16 ++++++++++++++++ 2 files changed, 33 insertions(+)
diff --git a/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi b/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi index 00767d2abd..0990005a15 100644 --- a/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi +++ b/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi @@ -7,6 +7,15 @@ chosen { u-boot,spl-boot-order = &sdmmc; }; + + aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdmmc; + serial1 = &uart1; + serial2 = &uart2; + spi0 = &sfc; + }; };
&cru { @@ -57,6 +66,14 @@ u-boot,spl-fifo-mode; };
+&sfc { + u-boot,dm-pre-reloc; +}; + +&{/sfc@ff3a0000/flash@0} { + u-boot,dm-pre-reloc; +}; + &uart1 { clock-frequency = <24000000>; u-boot,dm-pre-reloc; diff --git a/arch/arm/dts/rk3326-odroid-go2.dts b/arch/arm/dts/rk3326-odroid-go2.dts index 8cd4688c49..3866cc6612 100644 --- a/arch/arm/dts/rk3326-odroid-go2.dts +++ b/arch/arm/dts/rk3326-odroid-go2.dts @@ -617,6 +617,22 @@ status = "okay"; };
+&sfc { + pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus2>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <108000000>; + spi-rx-bus-width = <2>; + spi-tx-bus-width = <1>; + }; +}; + &tsadc { status = "okay"; };