This patch adds support for the ATEVK1100 evaluation kit, which contains an AT32UC3A0512ES chip.
Signed-off-by: Gunnar Rangoy gunnar@rangoy.com Signed-off-by: Paul Driveklepp pauldriveklepp@gmail.com Signed-off-by: Olav Morken olavmrk@gmail.com --- MAINTAINERS | 1 + MAKEALL | 1 + Makefile | 3 + board/atmel/atevk1100/Makefile | 44 ++++++++ board/atmel/atevk1100/atevk1100.c | 122 ++++++++++++++++++++++ board/atmel/atevk1100/config.mk | 4 + board/atmel/atevk1100/u-boot.lds | 73 +++++++++++++ include/configs/atevk1100.h | 207 +++++++++++++++++++++++++++++++++++++ 8 files changed, 455 insertions(+), 0 deletions(-) create mode 100644 board/atmel/atevk1100/Makefile create mode 100644 board/atmel/atevk1100/atevk1100.c create mode 100644 board/atmel/atevk1100/config.mk create mode 100644 board/atmel/atevk1100/u-boot.lds create mode 100644 include/configs/atevk1100.h
diff --git a/MAINTAINERS b/MAINTAINERS index 9c0d6bf..d83b580 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -747,6 +747,7 @@ Haavard Skinnemoen haavard.skinnemoen@atmel.com ATSTK1004 AT32AP7002 ATSTK1006 AT32AP7000 ATNGW100 AT32AP7000 + ATEVK1100 AT32UC3A0512
######################################################################### # SuperH Systems: # diff --git a/MAKEALL b/MAKEALL index 9ccb9ac..cd33214 100755 --- a/MAKEALL +++ b/MAKEALL @@ -720,6 +720,7 @@ LIST_coldfire=" \ #########################################################################
LIST_avr32=" \ + atevk1100 \ atstk1002 \ atstk1003 \ atstk1004 \ diff --git a/Makefile b/Makefile index 58b8331..d9fbc6e 100644 --- a/Makefile +++ b/Makefile @@ -3047,6 +3047,9 @@ $(BFIN_BOARDS): # AVR32 #========================================================================
+atevk1100_config : unconfig + @$(MKCONFIG) $(@:_config=) avr32 at32uc atevk1100 atmel at32uc3a0xxx + atngw100_config : unconfig @$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
diff --git a/board/atmel/atevk1100/Makefile b/board/atmel/atevk1100/Makefile new file mode 100644 index 0000000..b5ba79f --- /dev/null +++ b/board/atmel/atevk1100/Makefile @@ -0,0 +1,44 @@ +# +# (C) Copyright 2001-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# Copyright (C) 2005-2006 Atmel Corporation +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +include $(TOPDIR)/config.mk + +LIB := $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/atmel/atevk1100/atevk1100.c b/board/atmel/atevk1100/atevk1100.c new file mode 100644 index 0000000..d2d7893 --- /dev/null +++ b/board/atmel/atevk1100/atevk1100.c @@ -0,0 +1,122 @@ +/* + * Copyright (C) 2005-2006 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> + +#include <asm/io.h> +#include <asm/sram.h> +#include <asm/arch/clk.h> +#include <asm/arch/hmatrix.h> +#include <asm/arch/portmux.h> + +DECLARE_GLOBAL_DATA_PTR; + +static const struct sram_config sram_config = { + /* 2x16MBit, CY7C1069AV33-10ZXC */ + .data_bits = 16, + .address_bits = 21, + .ncs_rd_setup = 0, + .ncs_wr_setup = 0, + .nwe_setup = 0, + .nrd_setup = 0, + /* + * These settings works when running at 33Mhz, + * but fails at 54MHz + */ + + /* + .ncs_wr_pulse = 1, + .ncs_rd_pulse = 1, + .nwe_pulse = 1, + .nrd_pulse = 1, + .nwe_cycle = 2, + .nrd_cycle = 2, + */ + .ncs_wr_pulse = 2, + .ncs_rd_pulse = 2, + .nwe_pulse = 2, + .nrd_pulse = 2, + .nwe_cycle = 3, + .nrd_cycle = 3, + .chip_select = 2, + .read_mode = 1, + .write_mode = 1, + .exnw_mode = 0, + .bat = 1, + .tdf_cycles = 0, + .tdf_mode = 0, + .pmen = 0, + .ps = 1, + +}; +int board_early_init_f(void) +{ + /* Enable SDRAM in the EBI mux according to AP7000 datasheet */ + hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); + + /* 16 bit data, 24 bit address */ + portmux_enable_ebi(16, 23, 0, PORTMUX_DRIVE_HIGH); + portmux_enable_usart0(PORTMUX_DRIVE_MIN); +#if defined(CONFIG_MACB) + portmux_enable_macb(0, PORTMUX_DRIVE_HIGH); +#endif + + return 0; +} + +phys_size_t initdram(int board_type) +{ + unsigned long expected_size; + unsigned long actual_size; + void *sram_base; + + sram_base = map_physmem(EBI_SRAM_CS2_BASE, EBI_SRAM_CS2_SIZE, + MAP_NOCACHE); + + expected_size = sram_init(&sram_config); + actual_size = get_ram_size(sram_base, expected_size); + + unmap_physmem(sram_base, EBI_SRAM_CS2_SIZE); + + if (expected_size != actual_size) + printf("Warning: Only %lu of %lu MiB SDRAM is working\n", + actual_size >> 20, expected_size >> 20); + + return actual_size; +} + +int board_early_init_r(void) +{ + /* + * Physical address of phy. This is not used when the address is + * autodetected. See CONFIG_MACB_SEARCH_PHY. + */ + gd->bd->bi_phy_id[0] = 0xff; + return 0; +} + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bi) +{ + macb_eth_initialize(0, (void *)MACB_BASE, bi->bi_phy_id[0]); + return 0; +} +#endif diff --git a/board/atmel/atevk1100/config.mk b/board/atmel/atevk1100/config.mk new file mode 100644 index 0000000..ca23f88 --- /dev/null +++ b/board/atmel/atevk1100/config.mk @@ -0,0 +1,4 @@ +PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections +PLATFORM_LDFLAGS += --gc-sections +TEXT_BASE = 0x80000000 +LDSCRIPT = $(obj)board/atmel/atevk1100/u-boot.lds diff --git a/board/atmel/atevk1100/u-boot.lds b/board/atmel/atevk1100/u-boot.lds new file mode 100644 index 0000000..1c09641 --- /dev/null +++ b/board/atmel/atevk1100/u-boot.lds @@ -0,0 +1,73 @@ +/* -*- Fundamental -*- + * + * Copyright (C) 2005-2006 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") +OUTPUT_ARCH(avr32) +ENTRY(_start) + +SECTIONS +{ + . = 0x80000000; + _text = .; + .text : { + *(.exception.text) + *(.text) + *(.text.*) + } + _etext = .; + + .rodata : { + *(.rodata) + *(.rodata.*) + } + + . = ALIGN(8); + _data = .; + .data : { + *(.data) + *(.data.*) + } + + . = ALIGN(4); + __u_boot_cmd_start = .; + .u_boot_cmd : { + KEEP(*(.u_boot_cmd)) + } + __u_boot_cmd_end = .; + + . = ALIGN(4); + _got = .; + .got : { + *(.got) + } + _egot = .; + + . = ALIGN(8); + _edata = .; + + .bss (NOLOAD) : { + *(.bss) + *(.bss.*) + } + . = ALIGN(8); + _end = .; +} diff --git a/include/configs/atevk1100.h b/include/configs/atevk1100.h new file mode 100644 index 0000000..e6e4746 --- /dev/null +++ b/include/configs/atevk1100.h @@ -0,0 +1,207 @@ +/* + * Copyright (C) 2005-2006 Atmel Corporation + * + * Configuration settings for the ATEVK1100 evaluation kit + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/arch/memory-map.h> + +#define CONFIG_AVR32 1 +#define CONFIG_AT32UC 1 +#define CONFIG_AT32UC3A0xxx 1 +#define CONFIG_ATEVK1100 1 + +/* + * Timer clock frequency. We're using the CPU-internal COUNT register + * for this, so this is equivalent to the CPU core clock frequency + */ +#define CFG_HZ 1000 + +/* + * Set up the PLL to run at 132 MHz, and the CPU, PBA and PBB to run at PLL/2. + * fVCO = (CFG_OSC0_HZ * CFG_PLL0_MUL) / CFG_PLL0_DIV + * fPLL = fVCO / ((CFG_PLL0_OPT & 0x2) ? 2 : 1) + */ +#define CONFIG_PLL 1 +#define CFG_POWER_MANAGER 1 +#define CFG_OSC0_HZ 12000000 +#define CFG_PLL0_DIV 1 +#define CFG_PLL0_MUL 11 +#define CFG_PLL0_SUPPRESS_CYCLES 64 +/* + * Set the CPU running at: + * PLL / (2^CFG_CLKDIV_CPU) = CPU MHz + */ +#define CFG_CLKDIV_CPU 1 +/* + * Set the PBA running at: + * PLL / (2^CFG_CLKDIV_PBA) = PBA MHz + * On the atuc3a0512es, the maximum clock rate of PBA is 33 MHz. + */ +#define CFG_CLKDIV_PBA 1 +/* + * Set the PBB running at: + * PLL / (2^CFG_CLKDIV_PBB) = PBB MHz + */ +#define CFG_CLKDIV_PBB 1 + + +/* + * The PLLOPT register controls the PLL like this: + * + * Select the operating range for the PLL. + * PLLOPT[0]: Select the VCO frequency range. + * PLLOPT[1]: Enable the extra output divider. + * PLLOPT[2]: Disable the Wide-Bandwidth mode (Wide-Bandwidth mode allows a + * faster startup time and out-of-lock time). + * + * We want to run the cpu at 66 MHz, and the fVCO of the PLL at 132 MHz. + */ +#define CFG_PLL0_OPT 0x03 + + +#define CONFIG_USART0 1 +#undef CONFIG_USART1 +#undef CONFIG_USART2 +#undef CONFIG_USART3 + +/* User serviceable stuff */ +#define CONFIG_DOS_PARTITION 1 + +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_STACKSIZE (2048) + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTARGS \ + "console=ttyS0 ip=dhcp root=/dev/nfs rootwait=1" + +#define CONFIG_BOOTCOMMAND \ + "dhcp; bootm $(fileaddr)" + +/* + * Only interrupt autoboot if <space> is pressed. Otherwise, garbage + * data on the serial line may interrupt the boot sequence. + */ +#define CONFIG_BOOTDELAY 1 +#define CONFIG_AUTOBOOT 1 +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n", bootdelay +#define CONFIG_AUTOBOOT_DELAY_STR "d" +#define CONFIG_AUTOBOOT_STOP_STR " " + +/* + * After booting the board for the first time, new ethernet addresses + * should be generated and assigned to the environment variables + * "ethaddr" and "eth1addr". This is normally done during production. + */ +#define CONFIG_OVERWRITE_ETHADDR_ONCE 1 +#define CONFIG_NET_MULTI 1 + +/* + * BOOTP/DHCP options + */ +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_BOOTP_GATEWAY + + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP + +#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_XIMG + +/* Ethernet - RMII mode */ +#define CONFIG_MACB 1 +#define CONFIG_RMII 1 +/* + * 100Mbps requires a CPU clock of at least 50MHz for RMII mode, and 25MHz for + * MII mode. Set CONFIG_MACB_FORCE10M flag if clock is too slow for 100Mbit. + */ +#define CONFIG_MACB_FORCE10M 1 +/* + * On this board, the PHY can be found at different addresses (eiter 1 or 7). + */ +#define CONFIG_MACB_SEARCH_PHY 1 + +#define CONFIG_ATMEL_USART 1 +#define CONFIG_ATMEL_SPI 1 +#define CONFIG_PORTMUX_GPIO 1 +#define CFG_NR_PIOS 5 +#define CFG_SDRAMC 0 +#define CFG_SMC 1 + +#define CFG_DCACHE_LINESZ 32 +#define CFG_ICACHE_LINESZ 32 + +#define CONFIG_NR_DRAM_BANKS 1 + +/* Internal flash on the microcontroller (512kB)*/ +#define CFG_FLASH_BASE 0x80000000 +#define CFG_FLASH_SIZE 0x80000 +#define CFG_MAX_FLASH_BANKS 1 +#define CFG_MAX_FLASH_SECT 1024 + +#define CFG_MONITOR_BASE CFG_FLASH_BASE + +#define CFG_INTRAM_BASE INTERNAL_SRAM_BASE +#define CFG_INTRAM_SIZE INTERNAL_SRAM_SIZE +/* Not really SDRAM, maybe change to SRAM? */ +#define CFG_SDRAM_BASE EBI_SRAM_CS2_BASE + +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SIZE 65536 +#define CONFIG_ENV_ADDR (CFG_FLASH_BASE + CFG_FLASH_SIZE - \ + CONFIG_ENV_SIZE) + +#define CFG_INIT_SP_ADDR (CFG_INTRAM_BASE + CFG_INTRAM_SIZE) + +#define CFG_MALLOC_LEN (256*1024) +#define CFG_DMA_ALLOC_LEN (16384) + +/* Allow 2.5MB for the kernel run-time image */ +#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x00270000) +#define CFG_BOOTPARAMS_LEN (16 * 1024) + +/* Other configuration settings that shouldn't have to change all that often */ +#define CFG_PROMPT "U-Boot> " +#define CFG_CBSIZE 256 +#define CFG_MAXARGS 16 +#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) +#define CFG_LONGHELP 1 + +#define CFG_MEMTEST_START CFG_SDRAM_BASE +#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x700000) +#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } + +#endif /* __CONFIG_H */