Re: [PATCH 12/17] ufs: Add Support for Qualcomm UFS HC driver

On 8/14/23 23:54, Bhupesh Sharma wrote:

Add Support for the Host Controller driver for UFS HC present on Qualcomm Snapdragon SoCs.

[...]

+static void ufs_qcom_dev_ref_clk_ctrl(struct ufs_hba *hba, bool enable) +{

• struct ufs_qcom_priv *priv = dev_get_priv(hba->dev);
• if (priv->dev_ref_clk_ctrl_mmio &&

•    (enable ^ priv->is_dev_ref_clk_enabled)) {
  

Invert condition to reduce indent.

• u32 temp = readl_relaxed(priv->dev_ref_clk_ctrl_mmio);
  

• if (enable)
  

• 	temp |= priv->dev_ref_clk_en_mask;
  

• else
  

• 	temp &= ~priv->dev_ref_clk_en_mask;
  

• /*
  

•  * If we are here to disable this clock it might be immediately
  

•  * after entering into hibern8 in which case we need to make
  

•  * sure that device ref_clk is active for specific time after
  

•  * hibern8 enter.
  

•  */
  

• if (!enable)
  

• 	udelay(10);
  

• writel_relaxed(temp, priv->dev_ref_clk_ctrl_mmio);
  

• /*
  

•  * Make sure the write to ref_clk reaches the destination and
  

•  * not stored in a Write Buffer (WB).
  

•  */
  

• readl(priv->dev_ref_clk_ctrl_mmio);
  

• /*
  

•  * If we call hibern8 exit after this, we need to make sure that
  

•  * device ref_clk is stable for at least 1us before the hibern8
  

•  * exit command.
  

•  */
  

• if (enable)
  

• 	udelay(1);
  

• priv->is_dev_ref_clk_enabled = enable;
  

• }

+}

[...]

+static int ufs_qcom_check_hibern8(struct ufs_hba *hba) +{

• int err, retry_count = 50;
• u32 tx_fsm_val = 0;
• do {

• err = ufshcd_dme_get(hba,
  

• 		UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE,
  

• 			UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
  

• 		&tx_fsm_val);
  

• if (err || tx_fsm_val == TX_FSM_HIBERN8)
  

• 	break;
  

• /* max. 200us */
  

• udelay(200);
  

• retry_count--;
  

• } while (retry_count != 0);

Is this some readx_poll_timeout() reimplementation ?