rk3036 only 4K size SRAM for SPL, so only support timer, uart, sdram driver in SPL stage, when finish initial sdram, back to bootrom.And in rk3036 sdmmc and debug uart use same iomux, so if you want to boot from sdmmc, you must disable debug uart.
Signed-off-by: Lin Huang hl@rock-chips.com --- Changes in v1: - clean copyright announcement Changes in v2: - support SPL Changes in v3: - delete DEBUG_UART config - modify ENV_MEM_LAYOUT_SETTINGS config
arch/arm/mach-rockchip/Kconfig | 10 ++- arch/arm/mach-rockchip/Makefile | 4 +- arch/arm/mach-rockchip/board.c | 1 + arch/arm/mach-rockchip/rk3036-board-spl.c | 53 ++++++++++++ arch/arm/mach-rockchip/rk3036/Kconfig | 17 ++++ arch/arm/mach-rockchip/rk3036/Makefile | 1 + arch/arm/mach-rockchip/rk3036/save_boot_param.S | 34 ++++++++ include/configs/rk3036_common.h | 108 ++++++++++++++++++++++++ 8 files changed, 226 insertions(+), 2 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk3036-board-spl.c create mode 100644 arch/arm/mach-rockchip/rk3036/Kconfig create mode 100644 arch/arm/mach-rockchip/rk3036/save_boot_param.S create mode 100644 include/configs/rk3036_common.h
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index da665ef..6b608db 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -9,6 +9,14 @@ config ROCKCHIP_RK3288 and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UART,s, SPI, I2C and PWMs.
+config ROCKCHIP_RK3036 + bool "Support Rockchip RK3036" + help + The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 + including NEON and GPU, Mali-400 graphics, several DDR3 options + and video codec support. Peripherals include Gigabit Ethernet, + USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. + config SYS_MALLOC_F default y
@@ -34,5 +42,5 @@ config ROCKCHIP_SERIAL default y
source "arch/arm/mach-rockchip/rk3288/Kconfig" - +source "arch/arm/mach-rockchip/rk3036/Kconfig" endif diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index a29675d..b703c3c 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -6,10 +6,12 @@
ifdef CONFIG_SPL_BUILD obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o +obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o else -obj-y += board.o +obj-$(CONFIG_ROCKCHIP_RK3288) += board.o endif obj-y += rk_timer.o obj-y += rk_early_print.o obj-$(CONFIG_$(SPL_)ROCKCHIP_COMMON) += common.o obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/ +obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/ diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index 688bc0f..d7a8312 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -4,6 +4,7 @@ * SPDX-License-Identifier: GPL-2.0+ */
+#include <asm/io.h> #include <common.h> #include <dm.h> #include <ram.h> diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c new file mode 100644 index 0000000..731ee87 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3036-board-spl.c @@ -0,0 +1,53 @@ +/* + * (C) Copyright 2015 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/arch/grf_rk3036.h> +#include <asm/arch/hardware.h> +#include <asm/arch/sdram_rk3036.h> +#include <asm/arch/timer.h> +#include <asm/arch/uart.h> +#include <asm/io.h> +#include <common.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define GRF_BASE 0x20008000 +static struct rk3036_grf * const grf = (void *)GRF_BASE; + +#define DEBUG_UART_BASE 0x20068000 + +extern void back_to_bootrom(void); + +void board_init_f(ulong dummy) +{ + #ifdef EARLY_DEBUG + /* + * NOTE: sd card and debug uart use same iomux in rk3036, + * so if you enable uart, + * you can not boot from sdcard + */ + rk_clrsetreg(&grf->gpio1c_iomux, + GPIO1C3_MASK << GPIO1C3_SHIFT | + GPIO1C2_MASK << GPIO1C2_SHIFT, + GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT | + GPIO1C2_UART2_SIN << GPIO1C2_SHIFT); + rk_uart_init((void *)DEBUG_UART_BASE); + #endif + rockchip_timer_init(); + sdram_init(); + + /* return to maskrom */ + back_to_bootrom(); +} + +/* Place Holders */ +void board_init_r(gd_t *id, ulong dest_addr) +{ + /* Function attribute is no-return */ + /* This Function never executes */ + while (1) + ; +} diff --git a/arch/arm/mach-rockchip/rk3036/Kconfig b/arch/arm/mach-rockchip/rk3036/Kconfig new file mode 100644 index 0000000..0fbc58e --- /dev/null +++ b/arch/arm/mach-rockchip/rk3036/Kconfig @@ -0,0 +1,17 @@ +if ROCKCHIP_RK3036 + +config TARGET_EVB_RK3036 + bool "EVB_RK3036" + +config SYS_SOC + default "rockchip" + +config SYS_MALLOC_F_LEN + default 0x400 + +config ROCKCHIP_COMMON + bool "Support rk common fuction" + +source "board/evb_rk3036/evb_rk3036/Kconfig" + +endif diff --git a/arch/arm/mach-rockchip/rk3036/Makefile b/arch/arm/mach-rockchip/rk3036/Makefile index 6095777..97d299d 100644 --- a/arch/arm/mach-rockchip/rk3036/Makefile +++ b/arch/arm/mach-rockchip/rk3036/Makefile @@ -10,3 +10,4 @@ obj-y += syscon_rk3036.o endif
obj-y += sdram_rk3036.o +obj-y += save_boot_param.o diff --git a/arch/arm/mach-rockchip/rk3036/save_boot_param.S b/arch/arm/mach-rockchip/rk3036/save_boot_param.S new file mode 100644 index 0000000..996f9af --- /dev/null +++ b/arch/arm/mach-rockchip/rk3036/save_boot_param.S @@ -0,0 +1,34 @@ +/* + * (C) Copyright 2015 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/linkage.h> + +.globl SAVE_SP_ADDR +SAVE_SP_ADDR: + .word 0 + +/************************************************************************* + * + * void save_boot_params + * + * Save sp, lr, r1~r12 + * + *************************************************************************/ +ENTRY(save_boot_params) + push {r1-r12, lr} + ldr r0, =SAVE_SP_ADDR + str sp, [r0] + b save_boot_params_ret @ back to my caller +ENDPROC(save_boot_params) + + +.globl back_to_bootrom +ENTRY(back_to_bootrom) + ldr r0, =SAVE_SP_ADDR + ldr sp, [r0] + mov r0, #0 + pop {r1-r12, pc} +ENDPROC(back_to_bootrom) diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h new file mode 100644 index 0000000..97a3e99 --- /dev/null +++ b/include/configs/rk3036_common.h @@ -0,0 +1,108 @@ +/* + * (C) Copyright 2015 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __CONFIG_RK3036_COMMON_H +#define __CONFIG_RK3036_COMMON_H + +#include <asm/arch/hardware.h> + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_MALLOC_LEN (32 << 20) +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_THUMB_BUILD +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) +#define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ +#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) + +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_MEM32 + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MALLOC_SIMPLE +#endif + +#define CONFIG_SYS_TEXT_BASE 0x60000000 +#define CONFIG_SYS_INIT_SP_ADDR 0x60100000 +#define CONFIG_SYS_LOAD_ADDR 0x60800800 +#define CONFIG_SPL_STACK 0x10081fff +#define CONFIG_SPL_TEXT_BASE 0x10081004 + +#define CONFIG_ROCKCHIP_COMMON + +/* MMC/SD IP block */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_MMC +#define CONFIG_SDHCI +#define CONFIG_ROCKCHIP_3036_DWMMC +#define CONFIG_BOUNCE_BUFFER + +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_FAT +#define CONFIG_FAT_WRITE +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_PARTITION_UUIDS +#define CONFIG_CMD_PART + +/* RAW SD card / eMMC locations. */ +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256 +#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) + +/* FAT sd card locations. */ +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_TIME + +#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CONFIG_NR_DRAM_BANKS 1 +#define SDRAM_BANK_SIZE (512UL << 20UL) + +#define CONFIG_SPI_FLASH +#define CONFIG_SPI +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_SPI_FLASH_GIGADEVICE +#define CONFIG_SF_DEFAULT_SPEED 20000000 + +#define CONFIG_CMD_I2C + +#ifndef CONFIG_SPL_BUILD +#include <config_distro_defaults.h> + +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x60000000\0" \ + "pxefile_addr_r=0x60100000\0" \ + "fdt_addr_r=0x61f00000\0" \ + "kernel_addr_r=0x62000000\0" \ + "ramdisk_addr_r=0x64000000\0" + +/* First try to boot from SD (index 0), then eMMC (index 1 */ +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(MMC, mmc, 1) + +#include <config_distro_bootcmd.h> + +/* Linux fails to load the fdt if it's loaded above 512M on a Rock 2 board, so + * limit the fdt reallocation to that */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0x7fffffff\0" \ + ENV_MEM_LAYOUT_SETTINGS \ + BOOTENV +#endif + +#endif