Subject: [PATCH-OMAP3] OMAP3: Plain numbers don't need parens
From: Dirk Behme dirk.behme@gmail.com
Use a consistent style. Plain numbers don't need parens. Proposed by Wolfgang Denk.
Signed-off-by: Dirk Behme dirk.behme@gmail.com
--- include/asm-arm/arch-omap3/cpu.h | 66 +++++++++++++++--------------- include/asm-arm/arch-omap3/i2c.h | 20 ++++----- include/asm-arm/arch-omap3/mmc.h | 20 ++++----- include/asm-arm/arch-omap3/mmc_host_def.h | 2 include/asm-arm/arch-omap3/omap3.h | 22 +++++----- 5 files changed, 65 insertions(+), 65 deletions(-)
Index: u-boot-arm/include/asm-arm/arch-omap3/cpu.h =================================================================== --- u-boot-arm.orig/include/asm-arm/arch-omap3/cpu.h +++ u-boot-arm/include/asm-arm/arch-omap3/cpu.h @@ -46,45 +46,45 @@ #define GP_DEVICE 0x3
/* GPMC CS3/cs4/cs6 not avaliable */ -#define GPMC_BASE (OMAP34XX_GPMC_BASE) +#define GPMC_BASE OMAP34XX_GPMC_BASE
-#define GPMC_SYSCONFIG (0x10) -#define GPMC_IRQSTATUS (0x18) -#define GPMC_IRQENABLE (0x1C) -#define GPMC_TIMEOUT_CONTROL (0x40) -#define GPMC_CONFIG (0x50) -#define GPMC_STATUS (0x54) -#define GPMC_CONFIG_CS0 (0x60) +#define GPMC_SYSCONFIG 0x10 +#define GPMC_IRQSTATUS 0x18 +#define GPMC_IRQENABLE 0x1C +#define GPMC_TIMEOUT_CONTROL 0x40 +#define GPMC_CONFIG 0x50 +#define GPMC_STATUS 0x54 +#define GPMC_CONFIG_CS0 0x60
#define GPMC_CONFIG_REG (GPMC_BASE + GPMC_CONFIG) #define GPMC_CONFIG_CS0_BASE (GPMC_BASE + GPMC_CONFIG_CS0) -#define GPMC_CONFIG_WP (0x10) +#define GPMC_CONFIG_WP 0x10
-#define GPMC_CONFIG_WIDTH (0x30) +#define GPMC_CONFIG_WIDTH 0x30
-#define GPMC_CONFIG1 (0x00) -#define GPMC_CONFIG2 (0x04) -#define GPMC_CONFIG3 (0x08) -#define GPMC_CONFIG4 (0x0C) -#define GPMC_CONFIG5 (0x10) -#define GPMC_CONFIG6 (0x14) -#define GPMC_CONFIG7 (0x18) -#define GPMC_NAND_CMD (0x1C) -#define GPMC_NAND_ADR (0x20) -#define GPMC_NAND_DAT (0x24) - -#define GPMC_ECC_CONFIG (0x1F4) -#define GPMC_ECC_CONTROL (0x1F8) -#define GPMC_ECC_SIZE_CONFIG (0x1FC) -#define GPMC_ECC1_RESULT (0x200) -#define GPMC_ECC2_RESULT (0x204) -#define GPMC_ECC3_RESULT (0x208) -#define GPMC_ECC4_RESULT (0x20C) -#define GPMC_ECC5_RESULT (0x210) -#define GPMC_ECC6_RESULT (0x214) -#define GPMC_ECC7_RESULT (0x218) -#define GPMC_ECC8_RESULT (0x21C) -#define GPMC_ECC9_RESULT (0x220) +#define GPMC_CONFIG1 0x00 +#define GPMC_CONFIG2 0x04 +#define GPMC_CONFIG3 0x08 +#define GPMC_CONFIG4 0x0C +#define GPMC_CONFIG5 0x10 +#define GPMC_CONFIG6 0x14 +#define GPMC_CONFIG7 0x18 +#define GPMC_NAND_CMD 0x1C +#define GPMC_NAND_ADR 0x20 +#define GPMC_NAND_DAT 0x24 + +#define GPMC_ECC_CONFIG 0x1F4 +#define GPMC_ECC_CONTROL 0x1F8 +#define GPMC_ECC_SIZE_CONFIG 0x1FC +#define GPMC_ECC1_RESULT 0x200 +#define GPMC_ECC2_RESULT 0x204 +#define GPMC_ECC3_RESULT 0x208 +#define GPMC_ECC4_RESULT 0x20C +#define GPMC_ECC5_RESULT 0x210 +#define GPMC_ECC6_RESULT 0x214 +#define GPMC_ECC7_RESULT 0x218 +#define GPMC_ECC8_RESULT 0x21C +#define GPMC_ECC9_RESULT 0x220
/* GPMC Mapping */ #define FLASH_BASE 0x10000000 /* NOR flash, */ Index: u-boot-arm/include/asm-arm/arch-omap3/i2c.h =================================================================== --- u-boot-arm.orig/include/asm-arm/arch-omap3/i2c.h +++ u-boot-arm/include/asm-arm/arch-omap3/i2c.h @@ -103,14 +103,14 @@ #define I2C_SYSTEST_SDA_I (1 << 1) /* SDA line sense input value */ #define I2C_SYSTEST_SDA_O (1 << 0) /* SDA line drive output value */
-#define I2C_SCLL_SCLL (0) -#define I2C_SCLL_SCLL_M (0xFF) -#define I2C_SCLL_HSSCLL (8) -#define I2C_SCLH_HSSCLL_M (0xFF) -#define I2C_SCLH_SCLH (0) -#define I2C_SCLH_SCLH_M (0xFF) -#define I2C_SCLH_HSSCLH (8) -#define I2C_SCLH_HSSCLH_M (0xFF) +#define I2C_SCLL_SCLL 0 +#define I2C_SCLL_SCLL_M 0xFF +#define I2C_SCLL_HSSCLL 8 +#define I2C_SCLH_HSSCLL_M 0xFF +#define I2C_SCLH_SCLH 0 +#define I2C_SCLH_SCLH_M 0xFF +#define I2C_SCLH_HSSCLH 8 +#define I2C_SCLH_HSSCLH_M 0xFF
#define OMAP_I2C_STANDARD 100 #define OMAP_I2C_FAST_MODE 400 @@ -122,7 +122,7 @@ #define SYSTEM_CLOCK_96 96000
#define I2C_IP_CLK SYSTEM_CLOCK_96 -#define I2C_PSC_MAX (0x0f) -#define I2C_PSC_MIN (0x00) +#define I2C_PSC_MAX 0x0f +#define I2C_PSC_MIN 0x00
#endif /* _I2C_H_ */ Index: u-boot-arm/include/asm-arm/arch-omap3/mmc.h =================================================================== --- u-boot-arm.orig/include/asm-arm/arch-omap3/mmc.h +++ u-boot-arm/include/asm-arm/arch-omap3/mmc.h @@ -64,14 +64,14 @@
#define MMC_AC_CMD_RCA_MASK (unsigned int)(0xFFFF << 16) #define MMC_BC_CMD_DSR_MASK (unsigned int)(0xFFFF << 16) -#define MMC_DSR_DEFAULT (0x0404) -#define SD_CMD8_CHECK_PATTERN (0xAA) +#define MMC_DSR_DEFAULT 0x0404 +#define SD_CMD8_CHECK_PATTERN 0xAA #define SD_CMD8_2_7_3_6_V_RANGE (0x01 << 8)
/* Clock Configurations and Macros */
-#define MMC_CLOCK_REFERENCE (96) -#define MMC_RELATIVE_CARD_ADDRESS (0x1234) +#define MMC_CLOCK_REFERENCE 96 +#define MMC_RELATIVE_CARD_ADDRESS 0x1234 #define MMC_INIT_SEQ_CLK (MMC_CLOCK_REFERENCE * 1000 / 80) #define MMC_400kHz_CLK (MMC_CLOCK_REFERENCE * 1000 / 400) #define CLKDR(r, f, u) ((((r)*100) / ((f)*(u))) + 1) @@ -85,12 +85,12 @@ #define MMC_OCR_REG_HOST_CAPACITY_SUPPORT_BYTE (0x0 << 30) #define MMC_OCR_REG_HOST_CAPACITY_SUPPORT_SECTOR (0x1 << 30)
-#define MMC_SD2_CSD_C_SIZE_LSB_MASK (0xFFFF) -#define MMC_SD2_CSD_C_SIZE_MSB_MASK (0x003F) -#define MMC_SD2_CSD_C_SIZE_MSB_OFFSET (16) -#define MMC_CSD_C_SIZE_LSB_MASK (0x0003) -#define MMC_CSD_C_SIZE_MSB_MASK (0x03FF) -#define MMC_CSD_C_SIZE_MSB_OFFSET (2) +#define MMC_SD2_CSD_C_SIZE_LSB_MASK 0xFFFF +#define MMC_SD2_CSD_C_SIZE_MSB_MASK 0x003F +#define MMC_SD2_CSD_C_SIZE_MSB_OFFSET 16 +#define MMC_CSD_C_SIZE_LSB_MASK 0x0003 +#define MMC_CSD_C_SIZE_MSB_MASK 0x03FF +#define MMC_CSD_C_SIZE_MSB_OFFSET 2
#define MMC_CSD_TRAN_SPEED_UNIT_MASK (0x07 << 0) #define MMC_CSD_TRAN_SPEED_FACTOR_MASK (0x0F << 3) Index: u-boot-arm/include/asm-arm/arch-omap3/mmc_host_def.h =================================================================== --- u-boot-arm.orig/include/asm-arm/arch-omap3/mmc_host_def.h +++ u-boot-arm/include/asm-arm/arch-omap3/mmc_host_def.h @@ -141,7 +141,7 @@ #define VS18_1V8SUP (1 << 26)
/* Driver definitions */ -#define MMCSD_SECTOR_SIZE (512) +#define MMCSD_SECTOR_SIZE 512 #define MMC_CARD 0 #define SD_CARD 1 #define BYTE_MODE 0 Index: u-boot-arm/include/asm-arm/arch-omap3/omap3.h =================================================================== --- u-boot-arm.orig/include/asm-arm/arch-omap3/omap3.h +++ u-boot-arm/include/asm-arm/arch-omap3/omap3.h @@ -30,7 +30,7 @@ #define SMX_APE_BASE 0x68000000
/* GPMC */ -#define OMAP34XX_GPMC_BASE (0x6E000000) +#define OMAP34XX_GPMC_BASE 0x6E000000
/* SMS */ #define OMAP34XX_SMS_BASE 0x6C000000 @@ -47,12 +47,12 @@ #define OMAP34XX_L4_IO_BASE OMAP34XX_CORE_L4_IO_BASE
/* CONTROL */ -#define OMAP34XX_CTRL_BASE (OMAP34XX_L4_IO_BASE+0x2000) +#define OMAP34XX_CTRL_BASE (OMAP34XX_L4_IO_BASE + 0x2000)
/* UART */ -#define OMAP34XX_UART1 (OMAP34XX_L4_IO_BASE+0x6a000) -#define OMAP34XX_UART2 (OMAP34XX_L4_IO_BASE+0x6c000) -#define OMAP34XX_UART3 (OMAP34XX_L4_PER+0x20000) +#define OMAP34XX_UART1 (OMAP34XX_L4_IO_BASE + 0x6a000) +#define OMAP34XX_UART2 (OMAP34XX_L4_IO_BASE + 0x6c000) +#define OMAP34XX_UART3 (OMAP34XX_L4_PER + 0x20000)
/* General Purpose Timers */ #define OMAP34XX_GPT1 0x48318000 @@ -69,13 +69,13 @@ #define OMAP34XX_GPT12 0x48304000
/* WatchDog Timers (1 secure, 3 GP) */ -#define WD1_BASE (0x4830C000) -#define WD2_BASE (0x48314000) -#define WD3_BASE (0x49030000) +#define WD1_BASE 0x4830C000 +#define WD2_BASE 0x48314000 +#define WD3_BASE 0x49030000
/* 32KTIMER */ -#define SYNC_32KTIMER_BASE (0x48320000) -#define S32K_CR (SYNC_32KTIMER_BASE+0x10) +#define SYNC_32KTIMER_BASE 0x48320000 +#define S32K_CR (SYNC_32KTIMER_BASE + 0x10)
/* omap3 GPIO registers */ #define OMAP34XX_GPIO1_BASE 0x48310000 @@ -89,7 +89,7 @@ #define SRAM_OFFSET0 0x40000000 #define SRAM_OFFSET1 0x00200000 #define SRAM_OFFSET2 0x0000F800 -#define SRAM_VECT_CODE (SRAM_OFFSET0|SRAM_OFFSET1|\ +#define SRAM_VECT_CODE (SRAM_OFFSET0 | SRAM_OFFSET1 | \ SRAM_OFFSET2)
#define LOW_LEVEL_SRAM_STACK 0x4020FFFC