The SPL BSS is placed in DRAM for all sunxi boards at the moment, because the space in the A1 SRAM space, where the SPL is normally loaded, is limited. But this is problematic, because any BSS variable could be used before DRAM is initialised, eventually hanging the board. Many SoCs however have either a larger A1 region (H3: 64K) or have plenty of other SRAM space (A64: SRAM C with 108K) which can be used for those BSS variables. Put the BSS into an SRAM location for those boards.
Signed-off-by: Andre Przywara andre.przywara@arm.com --- arch/arm/cpu/armv7/sunxi/u-boot-spl.lds | 4 ++-- include/configs/sunxi-common.h | 17 +++++++++++++---- 2 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds index 53f0cbd..6576260 100644 --- a/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds +++ b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds @@ -16,7 +16,7 @@ */ MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\ LENGTH = CONFIG_SPL_MAX_SIZE } -MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \ +MEMORY { .bssmem : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \ LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") @@ -54,5 +54,5 @@ SECTIONS *(.bss*) . = ALIGN(4); __bss_end = .; - } > .sdram + } > .bssmem } diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 94275a7..39cbcb4 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -75,7 +75,6 @@ * since it needs to fit in with the other values. By also #defining it * we get warnings if the Kconfig value mismatches. */ #define CONFIG_SPL_STACK_R_ADDR 0x2fe00000 -#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 #else #define SDRAM_OFFSET(x) 0x4##x #define CONFIG_SYS_SDRAM_BASE 0x40000000 @@ -86,11 +85,8 @@ * since it needs to fit in with the other values. By also #defining it * we get warnings if the Kconfig value mismatches. */ #define CONFIG_SPL_STACK_R_ADDR 0x4fe00000 -#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 #endif
-#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ - #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) /* * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is @@ -221,6 +217,19 @@ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #endif
+#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN8I_H3) +/* Place BSS in SRAM, just above the stack. */ +#define CONFIG_SPL_BSS_START_ADDR LOW_LEVEL_SRAM_STACK +#define CONFIG_SPL_BSS_MAX_SIZE 0x00001000 /* 4 KiB */ +#else +/* + * Place BSS in SDRAM. This assumes that you don't use any BSS variables + * until after SDRAM has been initialised. + */ +#define CONFIG_SPL_BSS_START_ADDR SDRAM_OFFSET(ff80000) +#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ +#endif + /* I2C */ #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ defined CONFIG_SY8106A_POWER