Add PPC405GPr based MCU25 board from Netstal.
Signed-off-by: Niklaus Giger niklaus.giger@netstal.com --- board/netstal/mcu25/Makefile | 60 +++++++++++ board/netstal/mcu25/README.txt | 60 +++++++++++ board/netstal/mcu25/config.mk | 29 ++++++ board/netstal/mcu25/config.mk~ | 29 ++++++ board/netstal/mcu25/makefile~ | 56 +++++++++++ board/netstal/mcu25/mcu25.c | 212 ++++++++++++++++++++++++++++++++++++++++ board/netstal/mcu25/mcu25.c~ | 212 ++++++++++++++++++++++++++++++++++++++++ board/netstal/mcu25/u-boot.lds | 141 ++++++++++++++++++++++++++ 8 files changed, 799 insertions(+), 0 deletions(-) create mode 100644 board/netstal/mcu25/Makefile create mode 100644 board/netstal/mcu25/README.txt create mode 100644 board/netstal/mcu25/config.mk create mode 100644 board/netstal/mcu25/config.mk~ create mode 100644 board/netstal/mcu25/makefile~ create mode 100644 board/netstal/mcu25/mcu25.c create mode 100644 board/netstal/mcu25/mcu25.c~ create mode 100644 board/netstal/mcu25/u-boot.lds
diff --git a/board/netstal/mcu25/Makefile b/board/netstal/mcu25/Makefile new file mode 100644 index 0000000..f367f34 --- /dev/null +++ b/board/netstal/mcu25/Makefile @@ -0,0 +1,60 @@ +# +# (C) Copyright 2008 Netstal Maschinen AG +# Niklaus Giger (ng@netstal.com) +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +vpath fixed_sdram.c ../common +vpath hcu_flash.c ../common +vpath nm_bsp.c ../common + +# NOBJS : Netstal common objects +NOBJS = fixed_sdram.o hcu_flash.o nm_bsp.o +COBJS = $(BOARD).o +SOBJS = + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) ../common/$(NOBJS:.o=.c) +COBJS = $(BOARD).o +SOBJS = + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) ../common/$(NOBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +NOBJS := $(addprefix $(obj),$(NOBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(OBJS) $(SOBJS) $(NOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) $(NOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### + diff --git a/board/netstal/mcu25/README.txt b/board/netstal/mcu25/README.txt new file mode 100644 index 0000000..0b10342 --- /dev/null +++ b/board/netstal/mcu25/README.txt @@ -0,0 +1,60 @@ +MCU25 Configuration Details + +Memory Bank 0 -- Flash chip +--------------------------- + +0xfff00000 - 0xffffffff + +The flash chip is really only 512Kbytes, but the high address bit of +the 1Meg region is ignored, so the flash is replicated through the +region. Thus, this is consistent with a flash base address 0xfff80000. + +The placement at the end is to be consistent with reset behavior, +where the processor itself initially uses this bus to load the branch +vector and start running. + +On-Chip Memory +-------------- + +0xf4000000 - 0xf4000fff + +The 405GPr includes a 4K on-chip memory that can be placed however +software chooses. I choose to place the memory at this address, to +keep it out of the cachable areas. + + +Internal Peripherals +-------------------- + +0xef600300 - 0xef6008ff + +These are scattered various peripherals internal to the PPC405GPr +chip. + +Chip-Select 2: Flash Memory +--------------------------- + +0x70000000 + +Chip-Select 3: CAN Interface +---------------------------- +0x7800000 + + +Chip-Select 4: IMC-bus standard +------------------------------- + +Our IO-Bus (slow version) + + +Chip-Select 5: IMC-bus fast (inactive) +-------------------------------------- + +Our IO-Bus (fast, but not yet use) + + +Memory Bank 1 -- SDRAM +------------------------------------- + +0x00000000 - 0x2ffffff # Default 64 MB + diff --git a/board/netstal/mcu25/config.mk b/board/netstal/mcu25/config.mk new file mode 100644 index 0000000..12f61e7 --- /dev/null +++ b/board/netstal/mcu25/config.mk @@ -0,0 +1,29 @@ +# +# (C) Copyright 2005 Netstal Maschinen AG +# Niklaus Giger (ng@netstal.com) +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# Netstal Maschinen AG: MCU25 board +# + +TEXT_BASE = 0xFFFB0000 + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG -g +endif + diff --git a/board/netstal/mcu25/config.mk~ b/board/netstal/mcu25/config.mk~ new file mode 100644 index 0000000..2bb8e6d --- /dev/null +++ b/board/netstal/mcu25/config.mk~ @@ -0,0 +1,29 @@ +# +# (C) Copyright 2005 Netstal Maschinen AG +# Niklaus Giger (ng@netstal.com) +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# Netstal Maschinen AG: HCU4 boards +# + +TEXT_BASE = 0xFFFB0000 + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG -g +endif + diff --git a/board/netstal/mcu25/makefile~ b/board/netstal/mcu25/makefile~ new file mode 100644 index 0000000..7d65343 --- /dev/null +++ b/board/netstal/mcu25/makefile~ @@ -0,0 +1,56 @@ +# +# (C) Copyright 2007 Netstal Maschinen AG +# Niklaus Giger (ng@netstal.com) +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +vpath hcu_flash.c ../common +vpath fixed_sdram.c ../common +vpath nm_bsp.c ../common + +# NOBJS : Netstal common objects +NOBJS = fixed_sdram.o hcu_flash.o nm_bsp.o +COBJS = $(BOARD).o +SOBJS = + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) ../common/$(NOBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +NOBJS := $(addprefix $(obj),$(NOBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(OBJS) $(SOBJS) $(NOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) $(NOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### + diff --git a/board/netstal/mcu25/mcu25.c b/board/netstal/mcu25/mcu25.c new file mode 100644 index 0000000..da1d816 --- /dev/null +++ b/board/netstal/mcu25/mcu25.c @@ -0,0 +1,212 @@ +/* + *(C) Copyright 2005-2008 Netstal Maschinen AG + * Niklaus Giger (Niklaus.Giger@netstal.com) + * + * This source code is free software; you can redistribute it + * and/or modify it in source code form under the terms of the GNU + * General Public License as published by the Free Software + * Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#include <common.h> +#include <ppc4xx.h> +#include <asm/processor.h> +#include <asm/io.h> +#include <asm-ppc/u-boot.h> +#include "../common/nm.h" + +DECLARE_GLOBAL_DATA_PTR; + +#define MCU25_SLOT_ADDRESS (0x7A000000 + 0x0A) +#define MCU25_DIGITAL_IO_REGISTER (0x7A000000 + 0xc0) + +#define MCU25_LED_REGISTER_ADDRESS (0x7C000000 + 0x10) +#define MCU25_VERSIONS_REGISTER (0x7C000000 + 0x0C) +#define MCU25_IO_CONFIGURATION (0x7C000000 + 0x0e) +#define MCU_SW_INSTALL_REQUESTED 0x08 +#define HW_GENERATION_MCU25 0x09 + +#define SDRAM_LEN 32*1024*1024 /* 32 MB -RAM */ + +#undef DEBUG +/* + * This function is run very early, out of flash, and before devices are + * initialized. It is called by lib_ppc/board.c:board_init_f by virtue + * of being in the init_sequence array. + * + * The SDRAM has been initialized already -- start.S:start called + * init.S:init_sdram early on -- but it is not yet being used for + * anything, not even stack. So be careful. + */ + +#define CPC0_CR0 0xb1 /* Chip control register 0 */ +#define CPC0_CR1 0xb2 /* Chip control register 1 */ +/* Attention: If you want 1 microsecs times from the external oscillator + * 0x00004051 is okay for u-boot/linux, but different from old vxworks values + * 0x00804051 causes problems with u-boot and linux! + */ +#define CPC0_CR0_VALUE 0x0007F03C +#define CPC0_CR1_VALUE 0x00004051 +#define CPC0_ECR 0xaa /* Edge condition register */ +#define EBC0_CFG 0x23 /* External Peripheral Control Register */ +#define CPC0_EIRR 0xb6 /* External Interrupt Register */ + +#if defined(DEBUG) +void show_sdram_registers(void); +#endif +long int fixed_hcu4_sdram (unsigned int dram_size); + +int board_early_init_f (void) +{ + /* Documented in A-1171 + * + * Interrupt controller setup for the MCU25 board. + * Note: IRQ 0-15 405GP internally generated; high; level sensitive + * IRQ 16 405GP internally generated; low; level sensitive + * IRQ 17-24 RESERVED/UNUSED + * IRQ 31 (EXT IRQ 6) (unused) + */ + mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ + mtdcr (uicer, 0x00000000); /* disable all ints */ + mtdcr (uiccr, 0x00000000); /* set all to be non-critical */ + mtdcr (uicpr, 0xFFFFE000); /* set int polarities */ + mtdcr (uictr, 0x00000000); /* set int trigger levels */ + mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ + + mtdcr(CPC0_CR1, CPC0_CR1_VALUE); + mtdcr(CPC0_ECR, 0x60606000); + mtdcr(CPC0_EIRR, 0x7C000000); + out32(GPIO0_OR, CFG_GPIO0_OR ); + out32(GPIO0_TCR, CFG_GPIO0_TCR); + out32(GPIO0_ODR, CFG_GPIO0_ODR); + mtspr(ccr0, 0x00700000); + + return 0; +} + +#ifdef CONFIG_BOARD_PRE_INIT +int board_pre_init (void) +{ + return board_early_init_f (); +} +#endif + +int sys_install_requested(void) +{ + u16 *ioValuePtr = (u16 *)MCU25_DIGITAL_IO_REGISTER; + return (*ioValuePtr & MCU_SW_INSTALL_REQUESTED) != 0; +} + +int checkboard (void) +{ + u16 *boardVersReg = (u16 *) MCU25_VERSIONS_REGISTER; + u16 *hwConfig = (u16 *) MCU25_IO_CONFIGURATION; + u16 generation = *boardVersReg & 0x0f; + u16 index = *boardVersReg & 0xf0; + mtdcr(CPC0_CR0, CPC0_CR0_VALUE); + + /* Force /RTS to active. The board it not wired quite + correctly to use cts/rtc flow control, so just force the + /RST active and forget about it. */ + writeb (readb (0xef600404) | 0x03, 0xef600404); + /* reset ANSI terminal color mode */ + nm_show_print(generation, index, *hwConfig); + return 0; +} + +u32 hcu_led_get(void) +{ + return (*(u16 *)MCU25_LED_REGISTER_ADDRESS)& 0x3ff; +} + +/* + * hcu_led_set value to be placed into the LEDs (max 6 bit) + */ +void hcu_led_set(u32 value) +{ + *(u16 *)MCU25_LED_REGISTER_ADDRESS = value; +} + +/* + * sdram_init - Dummy implementation for start.S, spd_sdram or initdram + * used for HCUx + */ +void sdram_init(void) +{ + return; +} + +/* + * hcu_get_slot + */ +u32 hcu_get_slot(void) +{ + u16 *slot = (u16 *)MCU25_SLOT_ADDRESS; + return (*slot) & 0x7f; +} + +/* + * get_serial_number + */ +u32 get_serial_number(void) +{ + u32 *serial = (u32 *)CFG_FLASH_BASE; + + if (*serial == 0xffffffff) + return 0; + + return *serial; +} + + +/* + * misc_init_r. + */ + +int misc_init_r(void) +{ + common_misc_init_r(); + set_params_for_sw_install( sys_install_requested(), "mcu25" ); + return 0; +} + +long int initdram(int board_type) +{ + long int dram_size = 64*1024*1024; + fixed_hcu4_sdram(dram_size); + +#ifdef DEBUG + show_sdram_registers(); +#endif + + return dram_size; +} + +#if defined(CONFIG_POST) +/* + * Returns 1 if keys pressed to start the power-on long-running tests + * Called from board_init_f(). + */ +int post_hotkeys_pressed(void) +{ + return 0; /* No hotkeys supported */ +} +#endif /* CONFIG_POST */ + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup(blob, bd); + +} +#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ diff --git a/board/netstal/mcu25/mcu25.c~ b/board/netstal/mcu25/mcu25.c~ new file mode 100644 index 0000000..3219f9e --- /dev/null +++ b/board/netstal/mcu25/mcu25.c~ @@ -0,0 +1,212 @@ +/* + *(C) Copyright 2005-2007 Netstal Maschinen AG + * Niklaus Giger (Niklaus.Giger@netstal.com) + * + * This source code is free software; you can redistribute it + * and/or modify it in source code form under the terms of the GNU + * General Public License as published by the Free Software + * Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#include <common.h> +#include <ppc4xx.h> +#include <asm/processor.h> +#include <asm/io.h> +#include <asm-ppc/u-boot.h> +#include "../common/nm.h" + +DECLARE_GLOBAL_DATA_PTR; + +#define MCU25_SLOT_ADDRESS (0x7A000000 + 0x0A) +#define MCU25_DIGITAL_IO_REGISTER (0x7A000000 + 0xc0) + +#define MCU25_LED_REGISTER_ADDRESS (0x7C000000 + 0x10) +#define MCU25_VERSIONS_REGISTER (0x7C000000 + 0x0C) +#define MCU25_IO_CONFIGURATION (0x7C000000 + 0x0e) +#define MCU_SW_INSTALL_REQUESTED 0x08 +#define HW_GENERATION_MCU25 0x09 + +#define SDRAM_LEN 32*1024*1024 /* 32 MB -RAM */ + +#undef DEBUG +#if defined(DEBUG) +void show_sdram_registers(void); +#endif + +/* + * This function is run very early, out of flash, and before devices are + * initialized. It is called by lib_ppc/board.c:board_init_f by virtue + * of being in the init_sequence array. + * + * The SDRAM has been initialized already -- start.S:start called + * init.S:init_sdram early on -- but it is not yet being used for + * anything, not even stack. So be careful. + */ + +#define CPC0_CR0 0xb1 /* Chip control register 0 */ +#define CPC0_CR1 0xb2 /* Chip control register 1 */ +/* Attention: If you want 1 microsecs times from the external oscillator + * 0x00004051 is okay for u-boot/linux, but different from old vxworks values + * 0x00804051 causes problems with u-boot and linux! + */ +#define CPC0_CR0_VALUE 0x0007F03C +#define CPC0_CR1_VALUE 0x00004051 +#define CPC0_ECR 0xaa /* Edge condition register */ +#define EBC0_CFG 0x23 /* External Peripheral Control Register */ +#define CPC0_EIRR 0xb6 /* External Interrupt Register */ + + +int board_early_init_f (void) +{ + /* Documented in A-1171 */ + /*-------------------------------------------------------------------+ + | Interrupt controller setup for the MCU25 board. + | Note: IRQ 0-15 405GP internally generated; high; level sensitive + | IRQ 16 405GP internally generated; low; level sensitive + | IRQ 17-24 RESERVED/UNUSED + | IRQ 31 (EXT IRQ 6) (unused) + +-------------------------------------------------------------------*/ + mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ + mtdcr (uicer, 0x00000000); /* disable all ints */ + mtdcr (uiccr, 0x00000000); /* set all to be non-critical */ + mtdcr (uicpr, 0xFFFFE000); /* set int polarities */ + mtdcr (uictr, 0x00000000); /* set int trigger levels */ + mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ + + mtdcr(CPC0_CR1, CPC0_CR1_VALUE); + mtdcr(CPC0_ECR, 0x60606000); + mtdcr(CPC0_EIRR, 0x7C000000); + out32(GPIO0_OR, CFG_GPIO0_OR ); + out32(GPIO0_TCR, CFG_GPIO0_TCR); + out32(GPIO0_ODR, CFG_GPIO0_ODR); + mtspr(ccr0, 0x00700000); + + return 0; +} + +#ifdef CONFIG_BOARD_PRE_INIT +int board_pre_init (void) +{ + return board_early_init_f (); +} +#endif + +int sys_install_requested(void) +{ + u16 *ioValuePtr = (u16 *)MCU25_DIGITAL_IO_REGISTER; + return (*ioValuePtr & MCU_SW_INSTALL_REQUESTED) != 0; +} + +int checkboard (void) +{ + u16 *boardVersReg = (u16 *) MCU25_VERSIONS_REGISTER; + u16 *hwConfig = (u16 *) MCU25_IO_CONFIGURATION; + u16 generation = *boardVersReg & 0x0f; + u16 index = *boardVersReg & 0xf0; + mtdcr(CPC0_CR0, CPC0_CR0_VALUE); + + /* Force /RTS to active. The board it not wired quite + correctly to use cts/rtc flow control, so just force the + /RST active and forget about it. */ + writeb (readb (0xef600404) | 0x03, 0xef600404); + /* reset ANSI terminal color mode */ + nm_show_print(generation, index, *hwConfig); + return 0; +} + +u32 hcu_led_get(void) +{ + return (*(u16 *)MCU25_LED_REGISTER_ADDRESS)& 0x3ff; +} + +/*---------------------------------------------------------------------------+ + * hcu_led_set value to be placed into the LEDs (max 6 bit) + *---------------------------------------------------------------------------*/ +void hcu_led_set(u32 value) +{ + *(u16 *)MCU25_LED_REGISTER_ADDRESS = value; +} + +/* + * sdram_init - Dummy implementation for start.S, spd_sdram or initdram + * used for HCUx + */ +void sdram_init(void) +{ + return; +} + +/*---------------------------------------------------------------------------+ + * hcu_get_slot + *---------------------------------------------------------------------------*/ +u32 hcu_get_slot(void) +{ + u16 *slot = (u16 *)MCU25_SLOT_ADDRESS; + return (*slot) & 0x7f; +} + +/*---------------------------------------------------------------------------+ + * get_serial_number + *---------------------------------------------------------------------------*/ +u32 get_serial_number(void) +{ + u32 *serial = (u32 *)CFG_FLASH_BASE; + + if (*serial == 0xffffffff) + return 0; + + return *serial; +} + + +/*---------------------------------------------------------------------------+ + * misc_init_r. + *---------------------------------------------------------------------------*/ + +int misc_init_r(void) +{ + common_misc_init_r(); + set_params_for_sw_install( sys_install_requested(), "mcu25" ); + return 0; +} + +long int initdram(int board_type) +{ + long int dram_size = 64*1024*1024; + fixed_hcu4_sdram(dram_size); + +#ifdef DEBUG + show_sdram_registers(); +#endif + + return dram_size; +} + +#if defined(CONFIG_POST) +/* + * Returns 1 if keys pressed to start the power-on long-running tests + * Called from board_init_f(). + */ +int post_hotkeys_pressed(void) +{ + return 0; /* No hotkeys supported */ +} +#endif /* CONFIG_POST */ + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup(blob, bd); + +} +#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ diff --git a/board/netstal/mcu25/u-boot.lds b/board/netstal/mcu25/u-boot.lds new file mode 100644 index 0000000..bfa0a47 --- /dev/null +++ b/board/netstal/mcu25/u-boot.lds @@ -0,0 +1,141 @@ +/* + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + .resetvec 0xFFFFFFFC : + { + *(.resetvec) + } = 0xffff + + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : { + /* The start.o file includes the initial jump vector that + must be located in the beginning. It is the basic run- + time function that calls all other functions. */ + cpu/ppc4xx/start.o (.text) + +/* . = env_offset;*/ +/* common/environment.o(.text)*/ + + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + *(.eh_frame) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +} +