On 23/09/2012 14:03, Eric Bénard wrote:
this board is based on an i.MX25 from Freescale. It consists of a SOM containing :
- NAND flash (internal or external boot supported and tested)
- mDDR (64MB tested)
- ethernet PHY connected in RMII mode (tested)
and a baseboard containing :
- a serial transceiver on UART1 (tested)
- a SDCard connector on eSDHC1 (tested but disabled until Benoît's fix gets applied)
Hi Eric,
bootlog : U-Boot 2012.10-rc1-00003-gdd12be5 (Sep 23 2012 - 13:53:21)
CPU: Freescale i.MX25 rev1.2 at 399 MHz Reset cause: POR
DRAM: 64 MiB NAND: 256 MiB MMC: In: serial Out: serial Err: serial Net: FEC Hit any key to stop autoboot: 0
Signed-off-by: Eric Bénard eric@eukrea.com
v2: rebased against 2012.10-rc1, disabled eSDHC until proper fix from Benoît gets applied, updated bootlog.
MAINTAINERS | 2 + board/eukrea/cpuimx25/Makefile | 44 +++++++ board/eukrea/cpuimx25/config.mk | 5 + board/eukrea/cpuimx25/cpuimx25.c | 123 ++++++++++++++++++ board/eukrea/cpuimx25/imximage.cfg | 55 ++++++++ board/eukrea/cpuimx25/lowlevel_init.S | 113 ++++++++++++++++ boards.cfg | 2 + include/configs/cpuimx25.h | 198 +++++++++++++++++++++++++++++ nand_spl/board/eukrea/cpuimx25/Makefile | 79 ++++++++++++ nand_spl/board/eukrea/cpuimx25/config.mk | 1 + nand_spl/board/eukrea/cpuimx25/u-boot.lds | 83 ++++++++++++
There is a main issue with these patches. According to some discussion in previous threads and hopefully I do not misinterprete Wolfgang's will about the direction that U-Boot will have in future, the nand_spl code is obsolete and it remains for the already supported boards.
However, new boards must implement SPL using the SPL framework. New boards using nand_spl will not be integrated in mainline.
+######################################################################### diff --git a/board/eukrea/cpuimx25/config.mk b/board/eukrea/cpuimx25/config.mk new file mode 100644 index 0000000..18b2883 --- /dev/null +++ b/board/eukrea/cpuimx25/config.mk @@ -0,0 +1,5 @@ +ifdef CONFIG_NAND_SPL +CONFIG_SYS_TEXT_BASE = 0x810c0000 +else +CONFIG_SYS_TEXT_BASE = 0x81200000 +endif
config.mk is obsolete in board's directory. We removed most of these config.mk. It must not be used anymore.
+int board_init() +{ +#ifdef CONFIG_MXC_UART
Maybe you can drop the #ifdef, CONFIG_MXC_UART should always be set
+#ifdef CONFIG_FSL_ESDHC +int board_mmc_getcd(struct mmc *mmc) +{
- struct iomuxc_mux_ctl *muxctl;
- struct iomuxc_pad_ctl *padctl;
- struct gpio_regs *gpio2 = (struct gpio_regs *)IMX_GPIO2_BASE;
- u32 val;
- muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
- padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
- writel(MX25_PIN_MUX_MODE(5), &muxctl->pad_de_b);
Why is the setup of the iomux here and not in board_mmc_init ?
diff --git a/board/eukrea/cpuimx25/lowlevel_init.S b/board/eukrea/cpuimx25/lowlevel_init.S new file mode 100644 index 0000000..76e4e6f --- /dev/null +++ b/board/eukrea/cpuimx25/lowlevel_init.S @@ -0,0 +1,113 @@ +/*
- (C) Copyright 2009 DENX Software Engineering
- (C) Copyright 2012 Eukrea Electromatique <www.eukrea.com>
- Eric Benard eric@eukrea.com
- Based on tx25 and zmx25:
- Author: John Rigby jrigby@gmail.com
- Based on U-Boot and RedBoot sources for several different i.mx
- platforms.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <asm/macro.h> +#include <asm/arch/macro.h> +#include <asm/arch/imx-regs.h> +#include <generated/asm-offsets.h>
+.macro init_m3if
- write32 0xb8003000, 0x1
+.endm
+.macro init_clocks
- write32 0x53f80064, 0x00000000
- write32 0x53f80008, 0x20034000
- /*
* enable all implemented clocks in all three* clock control registers*/- write32 0x53f8000c, 0x1fffffff
- write32 0x53f80010, 0xffffffff
- write32 0x53f80014, 0xfdfff
+.endm
+.macro init_lpddr
- /* Skip SDRAM initialization if we run from RAM */
- cmp pc, #0x80000000
- bls 1f
- cmp pc, #0x90000000
- bhi 1f
- mov pc, lr
+1: ldr r0, =IMX_ESDRAMC_BASE
- ldr r2, =IMX_SDRAM_BANK0_BASE
- /*
* reset SDRAM controller* then wait for initialization to complete*/- ldr r1, =(1 << 1) | (1 << 2) | (1 << 3)
- str r1, [r0, #ESDRAMC_ESDMISC]
+2: ldr r3, [r0, #ESDRAMC_ESDMISC]
- tst r3, #(1 << 31)
- beq 2b
- ldr r1, =(1 << 2)
- str r1, [r0, #ESDRAMC_ESDMISC]
- ldr r1, =0x00295729
- str r1, [r0, #ESDRAMC_ESDCFG0]
- /* control | precharge */
- ldr r1, =0x92100000
- str r1, [r0, #ESDRAMC_ESDCTL0]
- /* dram command encoded in address */
- strb r1, [r2, #0x400]
- /* auto refresh */
- ldr r1, =0xa2100000
- str r1, [r0, #ESDRAMC_ESDCTL0]
- /* read dram twice to auto refresh */
- str r3, [r2]
- str r3, [r2]
- /* control | load mode */
- ldr r1, =0xb2100000
- str r1, [r0, #ESDRAMC_ESDCTL0]
- /* mode register of lpddram */
- strb r1, [r2, #0x33]
- /* extended mode register of lpddrram */
- ldr r2, =0x81000000
- strb r1, [r2]
- /* control | normal */
- ldr r1, =0x82216080
- str r1, [r0, #ESDRAMC_ESDCTL0]
+.endm
+.globl lowlevel_init +lowlevel_init:
- init_aips
- init_max
- init_m3if
- init_clocks
- init_lpddr
- mov pc, lr
diff --git a/boards.cfg b/boards.cfg index 091c79f..2cd6e4d 100644 --- a/boards.cfg +++ b/boards.cfg @@ -176,6 +176,8 @@ dockstar arm arm926ejs - Seagate tk71 arm arm926ejs tk71 karo kirkwood devkit3250 arm arm926ejs devkit3250 timll lpc32xx jadecpu arm arm926ejs jadecpu syteco mb86r0x +cpuimx25 arm arm926ejs cpuimx25 eukrea mx25 cpuimx25:IMX_CONFIG=board/eukrea/cpuimx25/imximage.cfg +cpuimx25nand arm arm926ejs cpuimx25 eukrea mx25 cpuimx25:NAND_U_BOOT
diff --git a/include/configs/cpuimx25.h b/include/configs/cpuimx25.h new file mode 100644 index 0000000..dc0a1d6 --- /dev/null +++ b/include/configs/cpuimx25.h @@ -0,0 +1,198 @@ +/*
- (C) Copyright 2009 DENX Software Engineering
- (C) Copyright 2012 Eukrea Electromatique <www.eukrea.com>
- Eric Benard eric@eukrea.com
- Based on tx25.c:
- Author: John Rigby jrigby@gmail.com
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#ifndef __CONFIG_H +#define __CONFIG_H
+/*
- Eukrea CPUIMX25 board - SoC Configuration
- */
+#define CONFIG_MX25 +#define CONFIG_MX25_CLK32 32768 /* OSC32K frequency */
A recent patch drop this. You should not need it. See commit 1b2080f3388b70c4c37b69830f73a61c50cdd505.
+#ifdef CONFIG_NAND_SPL
As I explained, NAND_SPL should not be used for new boards.
+/*
- MMC
- */
+#if 0
This is dead code. Drop it.
+#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR (0x53FB4000) +#define CONFIG_SYS_FSL_ESDHC_NUM 1 +#define CONFIG_SYS_FSL_ESDHC_USE_PIO 1 +#endif
diff --git a/nand_spl/board/eukrea/cpuimx25/Makefile b/nand_spl/board/eukrea/cpuimx25/Makefile new file mode 100644 index 0000000..d8b19c6
Sorry, not accepted anymore.
Best regards, Stefano Babic