From: Rick Chen rick@andestech.com
This patch will fix prior_stage_fdt_address write failure problem, when AE350 was booting from flash.
When AE350 was booting from falsh, prior_stage_fdt_address will be in flash address, we shall avoid it to be written.
Signed-off-by: Rick Chen rick@andestech.com Cc: Greentime Hu greentime@andestech.com --- arch/riscv/cpu/cpu.c | 2 ++ arch/riscv/cpu/start.S | 2 ++ 2 files changed, 4 insertions(+)
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index 768c44c..a17d37f 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -15,7 +15,9 @@ * The variables here must be stored in the data section since they are used * before the bss section is available. */ +# if CONFIG_IS_ENABLED(OF_PRIOR_STAGE) phys_addr_t prior_stage_fdt_address __attribute__((section(".data"))); +#endif #ifndef CONFIG_XIP u32 hart_lottery __attribute__((section(".data"))) = 0; /* diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 41d9a32..9ede1a7 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -111,7 +111,9 @@ call_board_init_f_0: bnez tp, secondary_hart_loop #endif
+# if CONFIG_IS_ENABLED(OF_PRIOR_STAGE) la t0, prior_stage_fdt_address +#endif SREG s1, 0(t0)
jal board_init_f_init_reserve