with this patch, this mpc8313 board does this:
U-Boot 2009.06-00524-g28958b8 (Jul 23 2009 - 18:33:11) MPC83XX
Reset Status:
CPU: e300c3, MPC8313E, Rev: 1.0 at 333.333 MHz, CSB: 166.667 MHz Board: Freescale MPC8313ERDB I2C: ready DRAM: 128 MB FLASH: ## Unknown FLASH on Bank 1 - Size = 0x00000000 = 0 MB *** failed *** ### ERROR ### Please RESET the board ###
and when reverted, it boots normally, so the board wants to
agree that
this patch is reverted.
Flash is mapped cacheable on 8313erdb (and some other 83xx boards) -- it shares a BAT with the locked cache area.
Yes. Scott is right. The rootcause is the classic PPC has not enough BAT.
8313erdb has an unused BAT7 (not counting the ones that would normally be used for PCI2), and there are other 83xx boards that look like they get it right.
I believe the 8313erdb is ported from 8349emds. The 8349emds, itx has same problem as 8313erdb.
We disable the MMU when we use the PCI express in current code. I remember we had to diable the MMU due to no enough BAT to cover PCI and PCI express and so on.
Thanks, Dave