Add adapter card type identification support by reading FPGA STAT_PRES1 register SDHC Card ID[0:2] bits. To use this function, define CONFIG_FSL_ESDHC_ADAPTER_IDENT.
Signed-off-by: Yangbo Lu yangbo.lu@freescale.com Cc: York Sun yorksun@freescale.com Cc: Pantelis Antoniou panto@antoniou-consulting.com --- Changes for v3: - Add Pantelis Antoniou to Cc list Changes for v2: - Document CONFIG_FSL_ESDHC_ADAPTER_IDENT --- --- arch/powerpc/include/asm/global_data.h | 3 +++ board/freescale/common/qixis.h | 14 +++++++++++++ doc/README.fsl-esdhc | 25 ++++++++++++++++++---- drivers/mmc/fsl_esdhc.c | 38 +++++++++++++++++++++++++++++++++- drivers/mmc/mmc.c | 6 ++++++ drivers/mmc/mmc_private.h | 3 +++ include/fsl_esdhc.h | 4 ++++ 7 files changed, 88 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h index c57d9c0..4090975 100644 --- a/arch/powerpc/include/asm/global_data.h +++ b/arch/powerpc/include/asm/global_data.h @@ -15,6 +15,9 @@ struct arch_global_data { #if defined(CONFIG_FSL_ESDHC) u32 sdhc_clk; +#if defined(CONFIG_FSL_ESDHC_ADAPTER_IDENT) + u8 sdhc_adapter; +#endif #endif #if defined(CONFIG_8xx) unsigned long brg_clk; diff --git a/board/freescale/common/qixis.h b/board/freescale/common/qixis.h index 52d2021..51ce9c3 100644 --- a/board/freescale/common/qixis.h +++ b/board/freescale/common/qixis.h @@ -115,4 +115,18 @@ void qixis_write_i2c(unsigned int reg, u8 value); qixis_write_i2c(offsetof(struct qixis, reg), value) #endif
+/* Use for SDHC adapter card type identification and operation */ +#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT +#define QIXIS_SDID_MASK 0x07 +#define QIXIS_ESDHC_ADAPTER_TYPE_EMMC45 0x1 /* eMMC Card Rev4.5 */ +#define QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY 0x2 /* SD/MMC Legacy Card */ +#define QIXIS_ESDHC_ADAPTER_TYPE_EMMC44 0x3 /* eMMC Card Rev4.4 */ +#define QIXIS_ESDHC_ADAPTER_TYPE_RSV 0x4 /* Reserved */ +#define QIXIS_ESDHC_ADAPTER_TYPE_MMC 0x5 /* MMC Card */ +#define QIXIS_ESDHC_ADAPTER_TYPE_SD 0x6 /* SD Card Rev2.0 3.0 */ +#define QIXIS_ESDHC_NO_ADAPTER 0x7 /* No Card is Present*/ +#define QIXIS_SDCLKIN 0x08 +#define QIXIS_SDCLKOUT 0x02 +#endif + #endif diff --git a/doc/README.fsl-esdhc b/doc/README.fsl-esdhc index b70f271..29cc661 100644 --- a/doc/README.fsl-esdhc +++ b/doc/README.fsl-esdhc @@ -1,5 +1,22 @@ -CONFIG_SYS_FSL_ESDHC_LE means ESDHC IP is in little-endian mode. -CONFIG_SYS_FSL_ESDHC_BE means ESDHC IP is in big-endian mode. +Freescale esdhc-specific options
-Accessing ESDHC registers can be determined by ESDHC IP's endian -mode or processor's endian mode. + - CONFIG_FSL_ESDHC_ADAPTER_IDENT + Support Freescale adapter card type identification. This is implemented by + operating Qixis FPGA relevant registers. The STAT_PRES1 register has SDHC + Card ID[0:2] bits showing the type of card installed in the SDHC Adapter Slot. + + SDHC Card ID[0:2] Adapter Card Type + 0b000 reserved + 0b001 eMMC Card Rev4.5 + 0b010 SD/MMC Legacy Card + 0b011 eMMC Card Rev4.4 + 0b100 reserved + 0b101 MMC Card + 0b110 SD Card Rev2.0/3.0 + 0b111 No card is present + - CONFIG_SYS_FSL_ESDHC_LE + ESDHC IP is in little-endian mode. Accessing ESDHC registers can be + determined by ESDHC IP's endian mode or processor's endian mode. + - CONFIG_SYS_FSL_ESDHC_BE + ESDHC IP is in big-endian mode. Accessing ESDHC registers can be determined + by ESDHC IP's endian mode or processor's endian mode. diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index f5d2ccb..355cada 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -643,6 +643,39 @@ int fsl_esdhc_mmc_init(bd_t *bis) return fsl_esdhc_initialize(bis, cfg); }
+#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT +void mmc_adapter_card_type_ident(void) +{ + u8 card_id; + u8 value; + + card_id = QIXIS_READ(present) & QIXIS_SDID_MASK; + gd->arch.sdhc_adapter = card_id; + + switch (card_id) { + case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45: + break; + case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY: + break; + case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44: + value = QIXIS_READ(brdcfg[5]); + value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT); + QIXIS_WRITE(brdcfg[5], value); + break; + case QIXIS_ESDHC_ADAPTER_TYPE_RSV: + break; + case QIXIS_ESDHC_ADAPTER_TYPE_MMC: + break; + case QIXIS_ESDHC_ADAPTER_TYPE_SD: + break; + case QIXIS_ESDHC_NO_ADAPTER: + break; + default: + break; + } +} +#endif + #ifdef CONFIG_OF_LIBFDT void fdt_fixup_esdhc(void *blob, bd_t *bd) { @@ -658,7 +691,10 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd)
do_fixup_by_compat_u32(blob, compat, "clock-frequency", gd->arch.sdhc_clk, 1); - +#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT + do_fixup_by_compat_u32(blob, compat, "adapter-type", + (u32)(gd->arch.sdhc_adapter), 1); +#endif do_fixup_by_compat(blob, compat, "status", "okay", 4 + 1, 1); } diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index a13769e..dc32aec 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -1588,6 +1588,9 @@ int mmc_start_init(struct mmc *mmc) if (mmc->has_init) return 0;
+#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT + mmc_adapter_card_type_ident(); +#endif board_mmc_power_init();
/* made sure it's not NULL earlier */ @@ -1739,6 +1742,9 @@ static void do_preinit(void) list_for_each(entry, &mmc_devices) { m = list_entry(entry, struct mmc, link);
+#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT + mmc_set_preinit(m, 1); +#endif if (m->preinit) mmc_start_init(m); } diff --git a/drivers/mmc/mmc_private.h b/drivers/mmc/mmc_private.h index 16dcf9f..447a700 100644 --- a/drivers/mmc/mmc_private.h +++ b/drivers/mmc/mmc_private.h @@ -16,6 +16,9 @@ extern int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data); extern int mmc_send_status(struct mmc *mmc, int timeout); extern int mmc_set_blocklen(struct mmc *mmc, int len); +#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT +void mmc_adapter_card_type_ident(void); +#endif
#ifndef CONFIG_SPL_BUILD
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 313fa1e..5462b4c 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -16,6 +16,10 @@ /* needed for the mmc_cfg definition */ #include <mmc.h>
+#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT +#include "../board/freescale/common/qixis.h" +#endif + /* FSL eSDHC-specific constants */ #define SYSCTL 0x0002e02c #define SYSCTL_INITA 0x08000000