Hi Dinh,
On Tue, 12 Mar 2019 at 22:41, Dinh Nguyen dinguyen@kernel.org wrote:
The cache UCLASS will be used for configure settings that can be found in a CPU's L2 cache controller.
Add a uclass and a test for cache.
Signed-off-by: Dinh Nguyen dinguyen@kernel.org
v2: separate out uclass patch from driver and add test
drivers/Kconfig | 2 ++ drivers/Makefile | 1 + drivers/cache/Kconfig | 16 ++++++++++++++++ drivers/cache/Makefile | 3 +++ drivers/cache/cache-uclass.c | 13 +++++++++++++ drivers/cache/sandbox_cache.c | 34 ++++++++++++++++++++++++++++++++++ include/cache.h | 33 +++++++++++++++++++++++++++++++++ include/dm/uclass-id.h | 1 + test/dm/cache.c | 19 +++++++++++++++++++ 9 files changed, 122 insertions(+) create mode 100644 drivers/cache/Kconfig create mode 100644 drivers/cache/Makefile create mode 100644 drivers/cache/cache-uclass.c create mode 100644 drivers/cache/sandbox_cache.c create mode 100644 include/cache.h create mode 100644 test/dm/cache.c
diff --git a/drivers/Kconfig b/drivers/Kconfig index f24351ac4f..842201b753 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -14,6 +14,8 @@ source "drivers/block/Kconfig"
source "drivers/bootcount/Kconfig"
+source "drivers/cache/Kconfig"
source "drivers/clk/Kconfig"
source "drivers/cpu/Kconfig" diff --git a/drivers/Makefile b/drivers/Makefile index a7bba3ed56..0a00096332 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -77,6 +77,7 @@ obj-$(CONFIG_BIOSEMU) += bios_emulator/ obj-y += block/ obj-y += board/ obj-$(CONFIG_BOOTCOUNT_LIMIT) += bootcount/ +obj-y += cache/ obj-$(CONFIG_CPU) += cpu/ obj-y += crypto/ obj-$(CONFIG_FASTBOOT) += fastboot/ diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig new file mode 100644 index 0000000000..8b7c9c7f9f --- /dev/null +++ b/drivers/cache/Kconfig @@ -0,0 +1,16 @@ +# +# Cache controllers +#
+menu "Cache Controller drivers"
+config CACHE
bool "Enable Driver Model for Cache controllers"depends on DMhelpEnable driver model for cache controllers that are found onmost CPU's. Cache is memory that the CPU can access directly andis usually located on the same chip. This uclass can be used forconfiguring settings that be found from a device tree file.+endmenu diff --git a/drivers/cache/Makefile b/drivers/cache/Makefile new file mode 100644 index 0000000000..2ba68060c1 --- /dev/null +++ b/drivers/cache/Makefile @@ -0,0 +1,3 @@
+obj-$(CONFIG_CACHE) += cache-uclass.o +obj-$(CONFIG_SANDBOX) += sandbox_cache.o diff --git a/drivers/cache/cache-uclass.c b/drivers/cache/cache-uclass.c new file mode 100644 index 0000000000..dd72e3e00f --- /dev/null +++ b/drivers/cache/cache-uclass.c @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright (C) 2019 Intel Corporation <www.intel.com>
- */
+#include <common.h> +#include <dm.h>
+UCLASS_DRIVER(cache) = {
.id = UCLASS_CACHE,.name = "cache",.post_bind = dm_scan_fdt_dev,+}; diff --git a/drivers/cache/sandbox_cache.c b/drivers/cache/sandbox_cache.c new file mode 100644 index 0000000000..b67ce31218 --- /dev/null +++ b/drivers/cache/sandbox_cache.c @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0 +/*
- Copyright (C) 2019 Intel Corporation <www.intel.com>
- */
+#include <common.h> +#include <dm.h> +#include <errno.h> +#include <cache.h>
+DECLARE_GLOBAL_DATA_PTR;
+static int sandbox_get_info(struct udevice *dev, struct cache_info *info) +{
info->base = 0;
How about setting this to a non-zero value and checking it in the test?
return 0;+}
+static const struct cache_ops sandbox_cache_ops = {
.get_info = sandbox_get_info,+};
+static const struct udevice_id sandbox_cache_ids[] = {
{ .compatible = "sandbox,cache" },{ }+};
+U_BOOT_DRIVER(cache_sandbox) = {
.name = "cache_sandbox",.id = UCLASS_CACHE,.of_match = sandbox_cache_ids,.ops = &sandbox_cache_ops,+}; diff --git a/include/cache.h b/include/cache.h new file mode 100644 index 0000000000..7a6faaf11c --- /dev/null +++ b/include/cache.h @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0 +/*
- Copyright (C) 2019 Intel Corporation <www.intel.com>
- */
+#ifndef __CACHE_H +#define __CACHE_H
+struct cache_info {
phys_addr_t base;
comment this struct and member
+};
+struct cache_ops {
/*** get_info() - Get basic cache info** @dev: Device to check (UCLASS_CACHE)* @info: Place to put info* @return 0 if OK, -ve on error*/int (*get_info)(struct udevice *dev, struct cache_info *info);+};
+/**
- cache_get_info() - Get information about a cache controller
- @dev: Device to check (UCLASS_CACHE)
- @info: Returns cache info
- @return 0 if OK, -ve on error
- */
+int cache_get_info(struct udevice *dev, struct cache_info *info);
+#endif diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 86e59781b0..09e0ad5391 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -34,6 +34,7 @@ enum uclass_id { UCLASS_BLK, /* Block device */ UCLASS_BOARD, /* Device information from hardware */ UCLASS_BOOTCOUNT, /* Bootcount backing store */
UCLASS_CACHE, /* Cache controller */ UCLASS_CLK, /* Clock source, e.g. used by peripherals */ UCLASS_CPU, /* CPU, typically part of an SoC */ UCLASS_CROS_EC, /* Chrome OS EC */diff --git a/test/dm/cache.c b/test/dm/cache.c new file mode 100644 index 0000000000..d66e82fb1c --- /dev/null +++ b/test/dm/cache.c @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0 +/*
- Copyright (C) 2019 Intel Corporation <www.intel.com>
- */
+#include <common.h> +#include <dm.h> +#include <dm/test.h>
+static int dm_test_reset(struct unit_test_state *uts) +{
struct udevice *dev_cache;ut_assertok(uclass_get_device(UCLASS_CACHE, 0, &dev_cache));
Should call cache_get_info() here and check result.
return 0;+}
+DM_TEST(dm_test_reset, DM_TESTF_SCAN_FDT);
2.20.0
Regards, Simon