Using PIC TFRR register for post word load/store for generic MPC85xx.
Signed-off-by: York Sun yorksun@freescale.com --- arch/powerpc/cpu/mpc85xx/cpu.c | 17 +++++++++++++++++ 1 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index f60fa47..7662cb8 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -286,6 +286,23 @@ void mpc85xx_reginfo(void) print_lbc_regs(); }
+#ifdef CONFIG_POST + +__attribute__((weak)) +void post_word_store(ulong a) +{ + void *save_addr = (void *)(CONFIG_SYS_MPC8xxx_PIC_ADDR + offsetof(ccsr_pic_t, tfrr)); + out_be32(save_addr, a); +} +__attribute__((weak)) +ulong post_word_load(void) +{ + void *save_addr = (void *)(CONFIG_SYS_MPC8xxx_PIC_ADDR + offsetof(ccsr_pic_t, tfrr)); + return in_be32(save_addr); +} + +#endif /* CONFIG_POST */ + #if CONFIG_POST & CONFIG_SYS_POST_MEMORY
/* Board-specific functions defined in each board's ddr.c */