Add missing GPIO registers address definition for Coldfire M5271.
Signed-off-by: Richard Retanubun RichardRetanubun@RuggedCom.com ---
This is based on mainline index:
commit 9d8811c5bd2b7dd6307742cf22fbdb7953b6f816 Merge: 716ebf4... bd99ec1... Author: Wolfgang Denk wd@denx.de Date: Tue Feb 3 23:16:15 2009 +0100
Merge branch 'master' of git://git.denx.de/u-boot-usb
And should be applied after my previous patch:
commit 1686c7b3355facd565cc008d5ab48cd05fb0e745 Author: Richard Retanubun RichardRetanubun@RuggedCom.com Date: Fri Jan 23 14:07:05 2009 -0500
Cleanup for M5271EVB: [snip]
include/asm-m68k/m5271.h | 32 ++++++++++++++++++++++++++++++++ 1 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/include/asm-m68k/m5271.h b/include/asm-m68k/m5271.h index 865fef1..d25261b 100644 --- a/include/asm-m68k/m5271.h +++ b/include/asm-m68k/m5271.h @@ -95,6 +95,32 @@ #define MCF_GPIO_PDDR_QSPI 0x10001A #define MCF_GPIO_PDDR_TIMER 0x10001B
+#define MCF_GPIO_PPDSDR_ADDR 0x100020 +#define MCF_GPIO_PPDSDR_DATAH 0x100021 +#define MCF_GPIO_PPDSDR_DATAL 0x100022 +#define MCF_GPIO_PPDSDR_BUSCTL 0x100023 +#define MCF_GPIO_PPDSDR_BS 0x100024 +#define MCF_GPIO_PPDSDR_CS 0x100025 +#define MCF_GPIO_PPDSDR_SDRAM 0x100026 +#define MCF_GPIO_PPDSDR_FECI2C 0x100027 +#define MCF_GPIO_PPDSDR_UARTH 0x100028 +#define MCF_GPIO_PPDSDR_UARTL 0x100029 +#define MCF_GPIO_PPDSDR_QSPI 0x10002A +#define MCF_GPIO_PPDSDR_TIMER 0x10002B + +#define MCF_GPIO_PCLRR_ADDR 0x100030 +#define MCF_GPIO_PCLRR_DATAH 0x100031 +#define MCF_GPIO_PCLRR_DATAL 0x100032 +#define MCF_GPIO_PCLRR_BUSCTL 0x100033 +#define MCF_GPIO_PCLRR_BS 0x100034 +#define MCF_GPIO_PCLRR_CS 0x100035 +#define MCF_GPIO_PCLRR_SDRAM 0x100036 +#define MCF_GPIO_PCLRR_FECI2C 0x100037 +#define MCF_GPIO_PCLRR_UARTH 0x100038 +#define MCF_GPIO_PCLRR_UARTL 0x100039 +#define MCF_GPIO_PCLRR_QSPI 0x10003A +#define MCF_GPIO_PCLRR_TIMER 0x10003B + #define MCF_GPIO_PAR_AD 0x100040 #define MCF_GPIO_PAR_BUSCTL 0x100042 #define MCF_GPIO_PAR_BS 0x100044 @@ -105,6 +131,12 @@ #define MCF_GPIO_PAR_QSPI 0x10004A #define MCF_GPIO_PAR_TIMER 0x10004C
+#define MCF_DSCR_EIM 0x100050 +#define MCF_DCSR_FEC12C 0x100052 +#define MCF_DCSR_UART 0x100053 +#define MCF_DCSR_QSPI 0x100054 +#define MCF_DCSR_TIMER 0x100055 + #define MCF_CCM_CIR 0x11000A #define MCF_CCM_CIR_PRN_MASK 0x3F #define MCF_CCM_CIR_PIN_LEN 6