=> 0x17800000 <_start>:	b	0x178002e8 <reset>
=> 0x178002e8 <reset>:	b	0x17800338 <save_boot_params>
=> 0x17800338 <save_boot_params>:	b	0x178002ec <save_boot_params_ret>
=> 0x178002ec <save_boot_params_ret>:	mrs	r0, CPSR
=> 0x178002f0 <save_boot_params_ret+4>:	and	r1, r0, #31
=> 0x178002f4 <save_boot_params_ret+8>:	teq	r1, #26
=> 0x178002f8 <save_boot_params_ret+12>:	bicne	r0, r0, #31
=> 0x178002fc <save_boot_params_ret+16>:	orrne	r0, r0, #19
=> 0x17800300 <save_boot_params_ret+20>:	orr	r0, r0, #192	; 0xc0
=> 0x17800304 <save_boot_params_ret+24>:	msr	CPSR_fc, r0
=> 0x17800308 <save_boot_params_ret+28>:	mrc	15, 0, r0, cr1, cr0, {0}
=> 0x1780030c <save_boot_params_ret+32>:	bic	r0, r0, #8192	; 0x2000
=> 0x17800310 <save_boot_params_ret+36>:	mcr	15, 0, r0, cr1, cr0, {0}
=> 0x17800314 <save_boot_params_ret+40>:	ldr	r0, [pc, #180]	; 0x178003d0
=> 0x17800318 <save_boot_params_ret+44>:	mcr	15, 0, r0, cr12, cr0, {0}
=> 0x1780031c <save_boot_params_ret+48>:	bl	0x1780033c <cpu_init_cp15>
=> 0x1780033c <cpu_init_cp15>:	mov	r0, #0
=> 0x17800340 <cpu_init_cp15+4>:	mcr	15, 0, r0, cr8, cr7, {0}
=> 0x17800344 <cpu_init_cp15+8>:	mcr	15, 0, r0, cr7, cr5, {0}
=> 0x17800348 <cpu_init_cp15+12>:	mcr	15, 0, r0, cr7, cr5, {6}
=> 0x1780034c <cpu_init_cp15+16>:	mcr	15, 0, r0, cr7, cr10, {4}
=> 0x17800350 <cpu_init_cp15+20>:	mcr	15, 0, r0, cr7, cr5, {4}
=> 0x17800354 <cpu_init_cp15+24>:	mrc	15, 0, r0, cr1, cr0, {0}
=> 0x17800358 <cpu_init_cp15+28>:	bic	r0, r0, #8192	; 0x2000
=> 0x1780035c <cpu_init_cp15+32>:	bic	r0, r0, #7
=> 0x17800360 <cpu_init_cp15+36>:	orr	r0, r0, #2
=> 0x17800364 <cpu_init_cp15+40>:	orr	r0, r0, #2048	; 0x800
=> 0x17800368 <cpu_init_cp15+44>:	orr	r0, r0, #4096	; 0x1000
=> 0x1780036c <cpu_init_cp15+48>:	mcr	15, 0, r0, cr1, cr0, {0}
=> 0x17800370 <cpu_init_cp15+52>:	mrc	15, 0, r0, cr15, cr0, {1}
=> 0x17800374 <cpu_init_cp15+56>:	orr	r0, r0, #16
=> 0x17800378 <cpu_init_cp15+60>:	mcr	15, 0, r0, cr15, cr0, {1}
=> 0x1780037c <cpu_init_cp15+64>:	mrc	15, 0, r0, cr15, cr0, {1}
=> 0x17800380 <cpu_init_cp15+68>:	orr	r0, r0, #64	; 0x40
=> 0x17800384 <cpu_init_cp15+72>:	mcr	15, 0, r0, cr15, cr0, {1}
=> 0x17800388 <cpu_init_cp15+76>:	mrc	15, 0, r0, cr15, cr0, {1}
=> 0x1780038c <cpu_init_cp15+80>:	orr	r0, r0, #2048	; 0x800
=> 0x17800390 <cpu_init_cp15+84>:	mcr	15, 0, r0, cr15, cr0, {1}
=> 0x17800394 <cpu_init_cp15+88>:	mrc	15, 0, r0, cr15, cr0, {1}
=> 0x17800398 <cpu_init_cp15+92>:	orr	r0, r0, #2097152	; 0x200000
=> 0x1780039c <cpu_init_cp15+96>:	mcr	15, 0, r0, cr15, cr0, {1}
=> 0x178003a0 <cpu_init_cp15+100>:	mrc	15, 0, r0, cr15, cr0, {1}
=> 0x178003a4 <cpu_init_cp15+104>:	orr	r0, r0, #4194304	; 0x400000
=> 0x178003a8 <cpu_init_cp15+108>:	mcr	15, 0, r0, cr15, cr0, {1}
=> 0x178003ac <cpu_init_cp15+112>:	mov	r5, lr
=> 0x178003b0 <cpu_init_cp15+116>:	mrc	15, 0, r1, cr0, cr0, {0}
=> 0x178003b4 <cpu_init_cp15+120>:	lsr	r3, r1, #20
=> 0x178003b8 <cpu_init_cp15+124>:	and	r3, r3, #15
=> 0x178003bc <cpu_init_cp15+128>:	and	r4, r1, #15
=> 0x178003c0 <cpu_init_cp15+132>:	lsl	r2, r3, #4
=> 0x178003c4 <cpu_init_cp15+136>:	orr	r2, r4, r2
=> 0x178003c8 <cpu_init_cp15+140>:	mov	pc, r5
=> 0x17800320 <save_boot_params_ret+52>:	bl	0x178003cc <cpu_init_crit>
=> 0x178003cc <cpu_init_crit>:	b	0x178003d4 <lowlevel_init>
=> 0x178003d4 <lowlevel_init>:	ldr	sp, [pc, #16]	; 0x178003ec
=> 0x178003d8 <lowlevel_init+4>:	bic	sp, sp, #7
=> 0x178003dc <lowlevel_init+8>:	mov	r9, #0
=> 0x178003e0 <lowlevel_init+12>:	push	{r12, lr}
=> 0x178003e4 <lowlevel_init+16>:	bl	0x17800a90 <s_init>
=> 0x17800a90 <s_init>:	push	{r3, lr}
=> 0x17800a94 <s_init+4>:	bl	0x17800700 <get_cpu_rev>
=> 0x17800700 <get_cpu_rev>:	ldr	r2, [pc, #92]	; 0x17800764 <get_cpu_rev+100>
=> 0x17800708 <get_cpu_rev+8>:	ubfx	r0, r3, #16, #8