This board has not been converted to CONFIG_DM_BLK by the deadline. Remove it.
Signed-off-by: Simon Glass sjg@chromium.org ---
board/solidrun/clearfog/MAINTAINERS | 6 -- board/solidrun/clearfog/Makefile | 5 - board/solidrun/clearfog/README | 51 --------- board/solidrun/clearfog/clearfog.c | 141 ------------------------- configs/clearfog_defconfig | 66 ------------ include/configs/clearfog.h | 157 ---------------------------- 6 files changed, 426 deletions(-) delete mode 100644 board/solidrun/clearfog/MAINTAINERS delete mode 100644 board/solidrun/clearfog/Makefile delete mode 100644 board/solidrun/clearfog/README delete mode 100644 board/solidrun/clearfog/clearfog.c delete mode 100644 configs/clearfog_defconfig delete mode 100644 include/configs/clearfog.h
diff --git a/board/solidrun/clearfog/MAINTAINERS b/board/solidrun/clearfog/MAINTAINERS deleted file mode 100644 index 6d0c3ef58bd..00000000000 --- a/board/solidrun/clearfog/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -CLEARFOG BOARD -M: Stefan Roese sr@denx.de -S: Maintained -F: board/solidrun/clearfog/ -F: include/configs/clearfog.h -F: configs/clearfog_defconfig diff --git a/board/solidrun/clearfog/Makefile b/board/solidrun/clearfog/Makefile deleted file mode 100644 index 5cfda3283c5..00000000000 --- a/board/solidrun/clearfog/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2015 Stefan Roese sr@denx.de - -obj-y := clearfog.o diff --git a/board/solidrun/clearfog/README b/board/solidrun/clearfog/README deleted file mode 100644 index a7bc0d4e23f..00000000000 --- a/board/solidrun/clearfog/README +++ /dev/null @@ -1,51 +0,0 @@ -Update from original Marvell U-Boot to mainline U-Boot: -------------------------------------------------------- - -Generate the U-Boot image with these commands: - -$ make clearfog_defconfig -$ make - -The resulting image including the SPL binary with the -full DDR setup is "u-boot-spl.kwb". - -Now all you need to do is copy this image on a SD card. -For example with this command: - -$ sudo dd if=u-boot-spl.kwb of=/dev/sdX bs=512 seek=1 - -Please use the correct device node for your setup instead -of "/dev/sdX" here! - -Boot selection: ---------------- - -Before powering up the board, boot selection should be done via the SW1 dip -switch (0: OFF, 1: ON): - - - SPI: 00010 - - SD/eMMC: 00111 - - M.2 SSD: 11100 - - UART: 01001 [1] - -[1]: According to SolidRun's manual, 11110 should be used for UART booting on - the ClearFog 'Pro' variant. - However, this doesn't work (anymore) at least on Rev. 2.1 (but '01001' as - mentionend for the 'Base' variant does). - -Boot from UART: ---------------- - -Connect the on-board micro-USB (CF Pro: CON11, CF Base: CON5) -to your host. - -Set the SW1 DIP switches to UART boot (see above). - -Run the following command to initiate U-Boot download: - - ./tools/kwboot -b u-boot-spl.kwb /dev/ttyUSBX - -Use the correct UART device node for /dev/ttyUSBX. - -When download finishes start your favorite terminal emulator -on /dev/ttyUSBX. diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c deleted file mode 100644 index 4e1386c8a22..00000000000 --- a/board/solidrun/clearfog/clearfog.c +++ /dev/null @@ -1,141 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2015 Stefan Roese sr@denx.de - */ - -#include <common.h> -#include <i2c.h> -#include <miiphy.h> -#include <netdev.h> -#include <asm/io.h> -#include <asm/arch/cpu.h> -#include <asm/arch/soc.h> - -#include "../drivers/ddr/marvell/a38x/ddr3_init.h" -#include <../serdes/a38x/high_speed_env_spec.h> - -DECLARE_GLOBAL_DATA_PTR; - -#define ETH_PHY_CTRL_REG 0 -#define ETH_PHY_CTRL_POWER_DOWN_BIT 11 -#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT) - -/* - * Those values and defines are taken from the Marvell U-Boot version - * "u-boot-2013.01-15t1-clearfog" - */ -#define BOARD_GPP_OUT_ENA_LOW 0xffffffff -#define BOARD_GPP_OUT_ENA_MID 0xffffffff - -#define BOARD_GPP_OUT_VAL_LOW 0x0 -#define BOARD_GPP_OUT_VAL_MID 0x0 -#define BOARD_GPP_POL_LOW 0x0 -#define BOARD_GPP_POL_MID 0x0 - -static struct serdes_map board_serdes_map[] = { - {SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0}, - {SGMII1, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0}, - {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, - {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, - {PEX2, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, - {SGMII2, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0}, -}; - -int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count) -{ - *serdes_map_array = board_serdes_map; - *count = ARRAY_SIZE(board_serdes_map); - return 0; -} - -/* - * Define the DDR layout / topology here in the board file. This will - * be used by the DDR3 init code in the SPL U-Boot version to configure - * the DDR3 controller. - */ -static struct mv_ddr_topology_map board_topology_map = { - DEBUG_LEVEL_ERROR, - 0x1, /* active interfaces */ - /* cs_mask, mirror, dqs_swap, ck_swap X PUPs */ - { { { {0x1, 0, 0, 0}, - {0x1, 0, 0, 0}, - {0x1, 0, 0, 0}, - {0x1, 0, 0, 0}, - {0x1, 0, 0, 0} }, - SPEED_BIN_DDR_1600K, /* speed_bin */ - MV_DDR_DEV_WIDTH_16BIT, /* memory_width */ - MV_DDR_DIE_CAP_4GBIT, /* mem_size */ - DDR_FREQ_800, /* frequency */ - 0, 0, /* cas_wl cas_l */ - MV_DDR_TEMP_LOW, /* temperature */ - MV_DDR_TIM_DEFAULT} }, /* timing */ - BUS_MASK_32BIT, /* Busses mask */ - MV_DDR_CFG_DEFAULT, /* ddr configuration data source */ - { {0} }, /* raw spd data */ - {0} /* timing parameters */ -}; - -struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) -{ - /* Return the board topology as defined in the board code */ - return &board_topology_map; -} - -int board_early_init_f(void) -{ - /* Configure MPP */ - writel(0x11111111, MVEBU_MPP_BASE + 0x00); - writel(0x11111111, MVEBU_MPP_BASE + 0x04); - writel(0x10400011, MVEBU_MPP_BASE + 0x08); - writel(0x22043333, MVEBU_MPP_BASE + 0x0c); - writel(0x44400002, MVEBU_MPP_BASE + 0x10); - writel(0x41144004, MVEBU_MPP_BASE + 0x14); - writel(0x40333333, MVEBU_MPP_BASE + 0x18); - writel(0x00004444, MVEBU_MPP_BASE + 0x1c); - - /* Set GPP Out value */ - writel(BOARD_GPP_OUT_VAL_LOW, MVEBU_GPIO0_BASE + 0x00); - writel(BOARD_GPP_OUT_VAL_MID, MVEBU_GPIO1_BASE + 0x00); - - /* Set GPP Polarity */ - writel(BOARD_GPP_POL_LOW, MVEBU_GPIO0_BASE + 0x0c); - writel(BOARD_GPP_POL_MID, MVEBU_GPIO1_BASE + 0x0c); - - /* Set GPP Out Enable */ - writel(BOARD_GPP_OUT_ENA_LOW, MVEBU_GPIO0_BASE + 0x04); - writel(BOARD_GPP_OUT_ENA_MID, MVEBU_GPIO1_BASE + 0x04); - - return 0; -} - -int board_init(void) -{ - /* Address of boot parameters */ - gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; - - /* Toggle GPIO41 to reset onboard switch and phy */ - clrbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9)); - clrbits_le32(MVEBU_GPIO1_BASE + 0x4, BIT(9)); - /* GPIO 19 on ClearFog rev 2.1 controls the uSOM onboard phy reset */ - clrbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19)); - clrbits_le32(MVEBU_GPIO0_BASE + 0x4, BIT(19)); - mdelay(1); - setbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9)); - setbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19)); - mdelay(10); - - return 0; -} - -int checkboard(void) -{ - puts("Board: SolidRun ClearFog\n"); - - return 0; -} - -int board_eth_init(bd_t *bis) -{ - cpu_eth_init(bis); /* Built in controller(s) come first */ - return pci_eth_init(bis); -} diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig deleted file mode 100644 index 2e59686291b..00000000000 --- a/configs/clearfog_defconfig +++ /dev/null @@ -1,66 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_THUMB_BUILD=y -CONFIG_ARCH_MVEBU=y -CONFIG_SYS_TEXT_BASE=0x00800000 -CONFIG_SPL_GPIO_SUPPORT=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_TARGET_CLEARFOG=y -CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC=y -CONFIG_SPL_MMC_SUPPORT=y -CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL=y -CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEBUG_UART=y -CONFIG_DISTRO_DEFAULTS=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_BOOTDELAY=3 -CONFIG_SYS_CONSOLE_INFO_QUIET=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x141 -CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_PCI=y -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_TFTPPUT=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_TIME=y -# CONFIG_SPL_PARTITION_UUIDS is not set -CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog" -CONFIG_ENV_IS_IN_MMC=y -CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPL_OF_TRANSLATE=y -CONFIG_SCSI_AHCI=y -CONFIG_DM_GPIO=y -CONFIG_DM_PCA953X=y -CONFIG_DM_I2C=y -CONFIG_SYS_I2C_MVTWSI=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_SDMA=y -CONFIG_MMC_SDHCI_MV=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_BAR=y -CONFIG_SPI_FLASH_WINBOND=y -CONFIG_SPI_FLASH_MTD=y -CONFIG_PHY_MARVELL=y -CONFIG_PHY_GIGE=y -CONFIG_MVNETA=y -CONFIG_MII=y -CONFIG_PCI=y -CONFIG_SCSI=y -CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y -CONFIG_KIRKWOOD_SPI=y -CONFIG_USB=y -CONFIG_DM_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_STORAGE=y diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h deleted file mode 100644 index 77ab6caf52c..00000000000 --- a/include/configs/clearfog.h +++ /dev/null @@ -1,157 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2015 Stefan Roese sr@denx.de - */ - -#ifndef _CONFIG_CLEARFOG_H -#define _CONFIG_CLEARFOG_H - -/* - * High Level Configuration Options (easy to change) - */ - -/* - * TEXT_BASE needs to be below 16MiB, since this area is scrubbed - * for DDR ECC byte filling in the SPL before loading the main - * U-Boot into it. - */ -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ - -/* - * Commands configuration - */ - -/* SPI NOR flash default params, used by sf commands */ -#define CONFIG_SF_DEFAULT_BUS 1 - -/* - * SDIO/MMC Card Configuration - */ -#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE - -#ifdef CONFIG_CMD_MMC -#define CONFIG_SUPPORT_EMMC_BOOT -#endif - -/* USB/EHCI configuration */ -#define CONFIG_EHCI_IS_TDI - -#define CONFIG_ENV_MIN_ENTRIES 128 - -/* Environment in MMC */ -#define CONFIG_SYS_MMC_ENV_DEV 0 -#define CONFIG_ENV_SECT_SIZE 0x200 -#define CONFIG_ENV_SIZE 0x10000 -/* - * For SD - reserve 1 LBA for MBR + 1M for u-boot image. The MMC/eMMC - * boot image starts @ LBA-0. - * As result in MMC/eMMC case it will be a 1 sector gap between u-boot - * image and environment - */ -#define CONFIG_ENV_OFFSET 0xf0000 -#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET - -#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ - -/* PCIe support */ -#ifndef CONFIG_SPL_BUILD -#define CONFIG_PCI_MVEBU -#define CONFIG_PCI_SCAN_SHOW -#endif - -/* SATA support */ -#ifdef CONFIG_SCSI -#define CONFIG_SCSI_AHCI_PLAT -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) -#endif - -/* Keep device tree and initrd in lower memory so the kernel can access them */ -#define RELOCATION_LIMITS_ENV_SETTINGS \ - "fdt_high=0x10000000\0" \ - "initrd_high=0x10000000\0" - -/* SPL */ - -/* Defines for SPL */ -#define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_TEXT_BASE 0x40000030 -#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) - -#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) - -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MALLOC_SIMPLE -#endif - -#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) -#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) - -#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI) -/* SPL related SPI defines */ -#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 -#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS -#elif defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) -/* SPL related MMC defines */ -#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10) -#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS -#ifdef CONFIG_SPL_BUILD -#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ -#endif -#endif - -/* - * mv-common.h should be defined after CMD configs since it used them - * to enable certain macros - */ -#include "mv-common.h" - -/* Include the common distro boot environment */ -#ifndef CONFIG_SPL_BUILD - -#ifdef CONFIG_MMC -#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) -#else -#define BOOT_TARGET_DEVICES_MMC(func) -#endif - -#ifdef CONFIG_USB_STORAGE -#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) -#else -#define BOOT_TARGET_DEVICES_USB(func) -#endif - -#define BOOT_TARGET_DEVICES(func) \ - BOOT_TARGET_DEVICES_MMC(func) \ - BOOT_TARGET_DEVICES_USB(func) \ - func(PXE, pxe, na) \ - func(DHCP, dhcp, na) - -#define KERNEL_ADDR_R __stringify(0x800000) -#define FDT_ADDR_R __stringify(0x100000) -#define RAMDISK_ADDR_R __stringify(0x1800000) -#define SCRIPT_ADDR_R __stringify(0x200000) -#define PXEFILE_ADDR_R __stringify(0x300000) - -#define LOAD_ADDRESS_ENV_SETTINGS \ - "kernel_addr_r=" KERNEL_ADDR_R "\0" \ - "fdt_addr_r=" FDT_ADDR_R "\0" \ - "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \ - "scriptaddr=" SCRIPT_ADDR_R "\0" \ - "pxefile_addr_r=" PXEFILE_ADDR_R "\0" - -#include <config_distro_bootcmd.h> - -#define CONFIG_EXTRA_ENV_SETTINGS \ - RELOCATION_LIMITS_ENV_SETTINGS \ - LOAD_ADDRESS_ENV_SETTINGS \ - "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ - "console=ttyS0,115200\0" \ - BOOTENV - -#endif /* CONFIG_SPL_BUILD */ - -#endif /* _CONFIG_CLEARFOG_H */