-----Original Message----- From: Stefano Babic [mailto:sbabic@denx.de] Sent: Tuesday, March 20, 2012 10:35 PM To: Estevam Fabio-R49496 Cc: u-boot@lists.denx.de; sbabic@denx.de; eric.nelson@boundarydevices.com; dirk.behme@de.bosch.com; Liu Hui- R64343 Subject: Re: [PATCH v6] mx6: Read silicon revision from register
On 20/03/2012 15:21, Fabio Estevam wrote:
Instead of hardcoding the mx6 silicon revision, read it in run-time.
Also, besides the silicon version print the mx6 variant type: quad,dual/solo or solo-lite.
Tested on a mx6qsabrelite, where it shows:
CPU: Freescale i.MX6Q rev1.0 at 792 MHz
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Changes since v5:
- Avoid duplication of code. Also tested on a mx51evk board.
Changes since v4:
- Distinguish the the CPU print depending on the SoC type (MX5 or MX6)
Changes since v3:
- Provide a complete struct for anatop registers Changes since v2:
- Read both chip variant and chip silicon version from anatop
- Create a struct for accessing the anatop registers Changes since v1:
- Fix typo on Subject
arch/arm/cpu/armv7/imx-common/cpu.c | 24 +++++- arch/arm/cpu/armv7/mx6/soc.c | 8 ++- arch/arm/include/asm/arch-mx6/imx-regs.h | 142 ++++++++++++++++++++++++++++++ 3 files changed, 171 insertions(+), 3 deletions(-)
Acked-by: Stefano Babic sbabic@denx.de
Acked-by: Jason Liu r64343@freescale.com
Best regards, Stefano Babic
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