On Wed, Nov 2, 2022 at 2:24 PM Pali Rohár pali@kernel.org wrote:
Hello! This log just cleanly shows that UART TX FIFO is either broken or something drops its content prior all bytes are properly transmitted. Dropping HW TX FIFO is on most UARTs possible by resetting registers or reconfiguring buadrate.
I have an idea, cannot some u-boot code calls some mxc function which changes parameters of UART and this will cause loosing of FIFO?
For example I see two functions which are doing it. Could you try to add code which waits until content of FIFO is transmitted prior changing UART parameters?
diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c index 4cf79c1ca24f..9611d9bc8a00 100644 --- a/drivers/serial/serial_mxc.c +++ b/drivers/serial/serial_mxc.c @@ -146,6 +146,9 @@ struct mxc_uart {
static void _mxc_serial_init(struct mxc_uart *base, int use_dte) {
while (!(readl(&base->ts) & UTS_TXEMPTY));writel(0, &base->cr1); writel(0, &base->cr2);@@ -169,6 +172,9 @@ static void _mxc_serial_setbrg(struct mxc_uart *base, unsigned long clk, { u32 tmp;
while (!(readl(&base->ts) & UTS_TXEMPTY));
Tried your suggestion, but the print() content I added inside board_init() is no longer printed.