I started looking into the Aspeed AST2400/2500 Hash and Crypto Engine (HACE) because I'm annoyed by the slight delay during FIT hash calculation. HACE is a single device that does hashing, DES/AES, and RSA in either immediate mode or via a single command queue.
I looked at drivers/crypto/fsl which supports their CAAM device and has a very similar architecture. There they register a UCLASS_MOD_EXP driver for the RSA portion and have a separate legacy driver that implements the hw_hash methods. Does making a new uclass for hash accelerators make sense or is it better to have a single crypto uclass that handles both hashing and RSA?
From a device tree standpoint, having a single node for HACE is
cleaner and more accurately represents the hardware. I could treat it as a multi-function device and add child nodes for hash and rsa but that is bleeding an implementation detail into the device tree.
Linux deals with this by having drivers register individual algorithms with the crypto framework during probe. I like this approach but it feels oddly out of place in U-Boot's driver model where iterating over the devices in a uclass is common. Is this pattern being intentionally avoided in U-Boot?
Rick