On 9/21/07, Demke Torsten-atd012 torsten.demke@motorola.com wrote:
Thanks all, I can now debug! Please see below...
ATUM4>bi 0xfffff01c Breakpoint identification is 0 ATUM4>go 0xfff80000 ATUM4>halt Target CPU : MPC85xx (e500v2 rev.2) Target state : halted Debug entry cause : COP halt Current PC : 0xf0000000 Current CR : 0x00000000 Current MSR : 0x00000200 Current LR : 0x00000000 Current CCSRBAR : 0x0_e0000000
This cannot work, as your own memory dump shows (above). You have the "magic word" and some ASCCI string at 0xfff80000. These are not valid ppc assembler instructions, but the begin of the u-boot image. Please check/dump address 0xfffffffc. There should be a valid jump instruction (see resetvec.S) which jumps to an address within a 4kbyte page at the end of the address space. ((0xfffff000, _start_e500()). There will be code that initializes the MMU that you can access the rest of the flash device(s), including the u-boot image (e.g cpu_init_f().
Seems so clear now - thank you very much for the kind help.
Am I reading all this to mean I should load uboot to 0xff800000 - is that wrong ?
This means your Boot flash devices starts is at address 0xff800000, not that your boot code starts at this address.
For a start I would use the 8548 cds linker script unchanged, build your u-boot image, flash it to 0xfff80000 and single-step with your BDI.
So I executed:
/home/iksrazal/eldk2/usr/bin> ./powerpc-linux-objdump -D /home/iksrazal/u-boot/u-boot > ~/u-boot.mydump
For clearer debugging, I compiled u-boot with:
OPTFLAGS= -Os -fno-schedule-insns -fno-schedule-insns2
After a reset in the bdi, I can now single step via 'ti' until:
ATUM>ti Target CPU : MPC85xx (e500v2 rev.2) Target state : halted Debug entry cause : single step Current PC : 0xfffff20c Current CR : 0x00000000 Current MSR : 0x00000200 Current LR : 0xfffff0b4 Current CCSRBAR : 0x0_e0000000 ATUM>ti Target CPU : MPC85xx (e500v2 rev.2) Target state : halted Debug entry cause : COP halt Current PC : 0xfff80e00 Current CR : 0x00000000 Current MSR : 0x00000000 Current LR : 0xfffff210 Current CCSRBAR : 0x0_e000000
Where in ~/u-boot.mydump :
fffff208 <tlb1_entry>: fffff208: 7c 28 02 a6 mflr r1 fffff20c: 48 00 00 b9 bl fffff2c4 <tlb1_entry+0xbc>
And:
fff80e00 <InstructionTLBError>
fffff20c is seemingly my init.S code - how can I find out for sure? The first lines I have are:
#define entry_start \ mflr r1 ; \ bl 0f ;
Thanks all more than words can tell, Robert